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View Code? Open in Web Editor NEWdovzhyna - x86 (IA32) instruction length decoding library
License: The Unlicense
dovzhyna - x86 (IA32) instruction length decoding library
License: The Unlicense
Such information would include: mnemonic, logical arguments, type pointed to by mod/rm.
This would require decoding instructions completely, as opposed to generalizing instruction characteristics as seen in 0F table.
There is no reason for this to use C++
amd64 arch introduces bunch of fun stuff like REX/(E)VEX prefixes, etc.
I kinda assumed that 32-bit didn't support these, but turns out those extra register bits are inverted for a reason: if you stick to the first eight registers, the instructions (LDS, LES, BOUND) will always have 11xxxxxx in the mod/rm byte, which is illegal, since all of these operate on memory only. Thus IA-32 does support (E)VEX prefixes.
I don't think this is much of an issue, since by the time AVX becomes old enough to actually be used by anyone, people will stop targeting IA-32, and switch to AMD64 (see #1, the need to support VEX is actually part of the reason why I initially limited the scope to IA-32).
I'm thinking of putting this under unlicense.
@KTRosenberg are you ok with that?
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