The commit

43220e7 Machine: LFU cache policy incorrect use of sets count instead of degree of associativity

corrects loop iteration in LFU statistic updates which should be for all ways of associativity and not for the sets/rows.
But test fails for the corrected setup. The precomputed values for LFU are probably taken from the previous results obtained from program itself. What is a right way to update them?

FAIL!  : TestCache::cache_correctness(endian=LITTLE, address=0xffffff, stride=0, value=0x4142434445464748, cache_config={ 1,
 r=2, wr=1, s=1, b=8, a=2 }) Compared values are not the same
   Actual   (performance)                                : std::tuple(44, 2)
   Expected (cache_test_performance_data.at(case_number)): std::tuple(16, 30)
   Loc: [/opt/qtrvsim/git/src/machine/memory/cache/cache.test.cpp(248)]
FAIL!  : TestCache::cache_correctness(endian=LITTLE, address=0xffffff, stride=1, value=0x4142434445464748, cache_config={ 1,
 r=2, wr=1, s=1, b=8, a=2 }) Compared values are not the same
   Actual   (performance)                                : std::tuple(19, 2)
   Expected (cache_test_performance_data.at(case_number)): std::tuple(18, 3)
   Loc: [/opt/qtrvsim/git/src/machine/memory/cache/cache.test.cpp(248)]
FAIL!  : TestCache::cache_correctness(endian=LITTLE, address=0xffffff, stride=2, value=0x4142434445464748, cache_config={ 1,
 r=2, wr=1, s=1, b=8, a=2 }) Compared values are not the same
   Actual   (performance)                                : std::tuple(19, 2)
   Expected (cache_test_performance_data.at(case_number)): std::tuple(18, 3)
   Loc: [/opt/qtrvsim/git/src/machine/memory/cache/cache.test.cpp(248)]

Port changes done in QtMips.

Mentioned in: cvut/QtMips#14

https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md

https://build.opensuse.org/package/live_build_log/home:jdupak/qtrvsim/Fedora_34/x86_64

Sometimes I put the windows/docks into bad configuration and I would like to just reset it, without searching for the config file and deleting it.

Ideas

• [UX] Animate link open. Avoid feeling that nothing happened.
• [UI] Tooltip from svg / link to docs.
• [Core] Add variable sized branch predictor for experiments.

Planned

• [UX] Hide print in menu when print is not supported.
• [BUG] Ctrl+P does not work.
• [UI] RV instruction detail.

In progress

Done

• [UX] Show error when printing is not supported instead of ignoring the user.

addi x1, x0, $5
addi x2, x1, $10

Reported by @MatejKafka

Press "Start Empty" Buttom, you get Figure 1 who have a tons of "Unknown".

Then press "Run" Buttom, it says "UnsupportedInstruction" seen on Figure 2.

Successfully reproduced on v0.9.6. v0.9.5 works fine.

When running the cli with the following settings:

$ qtrvsim_cli --dump-cycles --asm --load-range 0x12340,array_size.in --load-range 0x12344,array_data.in --dump-range 0x12344,60,array_data.out bubble-sort.S

I get output:

[DEBUG] instruction:	Base instruction of the name la not found.
[DEBUG] instruction:	Base instruction of the name la not found.
[DEBUG] instruction:	Base instruction of the name bgt not found.
[DEBUG] instruction:	Base instruction of the name j not found.
[DEBUG] instruction:	Base instruction of the name j not found.
[DEBUG] machine.core:	Exception cause 9 instruction PC 0x0000025c next PC 0x00000260 jump branch PC 0x00000258 registers PC 0x00000260 mem ref 0x00000000
Machine stopped on BREAK exception.
Machine state report:
cycles: 784
stalls: 0
Failure closing array_data.out

Notably, I do not get these issues (with the instructions not found) when not using the --asm flag.
How come pesudo-instructions are not found with these settings?
Is it possible some bool value is not being passed down?

I was asking for support in the FEL Discord in #apo channel. Another user had the following idea:

Instruction::pseudo_from_tokens calls code_from_tokens always with pseudoinst_enabled = false because it does not accept pseudoinst_enabled as an argument.

Can you confirm what happens what happens with the pseudoinst support if the --asm flag is used?

Implement link from coreview PC that causes focus of current PC in program memory.

$ flatpak install --user https://dl.flathub.org/build-repo/74697/cz.cvut.edu.comparch.qtrvsim.flatpakref
$ flatpak run cz.cvut.edu.comparch.qtrvsim

When you open the application and first action is clicking "Example" button, application silently crashes.

Works for 0.9.5 or when you press something else before pressing "Example" button

Reproduce:

addi x10, x0, -3
addi x15, x0, 1
sra x12, x10, x15

addi x10, x0, -3
srai x12, x10, 0x1

Expected behavior:
content of x12 is -2 (0xfffffffe)
Actual behavior:
content of x12 is 0x7ffffffe
Version: 0.8.1

It seems that only single digit symbolic registers are recognized by internal parser

When 32-bit build is run

riscv64-unknown-elf-gcc -ggdb -Os -Wall -mabi=ilp32 -nostartfiles -nostdlib -static -march=rv32im -fno-lto template-os.S -o template-os

of the next code

.globl _start
.globl __start
.option norelax

// Linux kernel compatible system calls subset

.equ __NR_exit,        93  // void exit(int status)
.equ __NR_read,        63  // ssize_t read(int fd, void *buf, size_t count)
.equ __NR_write,       64  // ssize_t write(int fd, const void *buf, size_t count)
.equ __NR_close,       57  // int close(int fd)
.equ __NR_openat,      56  // int openat(int fd, const char *pathname, int flags, mode_t mode)
	// use fd = -100 for normal open behaviour. Full openat not supported.
.equ __NR_brk,         214 // void * brk(void *addr)
.equ __NR_ftruncate64, 46  // int ftruncate64(int fd, off_t length)
.equ __NR_readv,       65  // ssize_t readv(int fd, const struct iovec *iov, int iovcnt)
.equ __NR_writev,      66  // ssize_t writev(int fd, const struct iovec *iov, int iovcnt)

.text

__start:
_start:
	addi  a7, zero, __NR_write        // load syscall number
	addi  a0, zero, 1                 // load file descriptor
	la  a1, text_1                    // load text address
	li  a2, 13                        // load text length
	ecall                             // print the text

	addi  a7, zero, __NR_exit         // load syscall numver
	addi  a0, zero, 0                 // load status argument
	ecall                             // exit

final:
	ebreak                            // request developer interaction
	jal   zero, final

.data
.org 0x400

data_1:	.word	1, 2, 3, 4

text_1:	.ascii	"Hello world.\n"	// store ASCII text, no termination
text_1_e:

the expected output of "Hello world." is not seen.

It is necessary to check state of system emulation enable for CLI CPU setup, it should be enabled by default probably. Some option to control enable, disable and trap would worth to be added.

Description

I have the problem that my text is not really visible when typing in the text field.

Workaround

I discovered that it's related to the system theme. Using light mode doesn't have this issue.

Light Mode	Dark Mode

System: MacBook Pro M1, macOS 13.6, I'm using v0.9.5 of qtrvsim

Maybe related to #78

Running the current QtRvSim master branch on Ubuntu 22.04 reveals an accidental double free in the control register widget. Whenever I close the main QtRvSim window, I get the following ASan error in debug builds (release builds just crash with assertion failure):

=================================================================
==15235==ERROR: AddressSanitizer: heap-use-after-free on address 0x60e000127fc0 at pc 0x55bbe308838e bp 0x7ffe39831ae0 sp 0x7ffe39831ad0
READ of size 8 at 0x60e000127fc0 thread T0
    #0 0x55bbe308838d in QScopedPointerDeleter<StaticTable>::cleanup(StaticTable*) /usr/include/x86_64-linux-gnu/qt5/QtCore/qscopedpointer.h:60
    #1 0x55bbe3087a4b in QScopedPointer<StaticTable, QScopedPointerDeleter<StaticTable> >::~QScopedPointer() /usr/include/x86_64-linux-gnu/qt5/QtCore/qscopedpointer.h:107
    #2 0x55bbe3084dd6 in CsrDock::~CsrDock() (/home/kuba/tmp/qtrvsim/build/Debug/target/qtrvsim_gui+0xac9dd6)
    #3 0x55bbe3084f27 in CsrDock::~CsrDock() (/home/kuba/tmp/qtrvsim/build/Debug/target/qtrvsim_gui+0xac9f27)
    #4 0x7f5afa25ca6d in QObjectPrivate::deleteChildren() (/lib/x86_64-linux-gnu/libQt5Core.so.5+0x2e4a6d)
    #5 0x7f5afad5fbc5 in QWidget::~QWidget() (/lib/x86_64-linux-gnu/libQt5Widgets.so.5+0x1aabc5)
    #6 0x55bbe32501ca in MainWindow::~MainWindow() /home/kuba/tmp/qtrvsim/src/gui/mainwindow/mainwindow.cpp:164
    #7 0x55bbe3241310 in main /home/kuba/tmp/qtrvsim/src/gui/main.cpp:41
    #8 0x7f5af9411d8f in __libc_start_call_main ../sysdeps/nptl/libc_start_call_main.h:58
    #9 0x7f5af9411e3f in __libc_start_main_impl ../csu/libc-start.c:392
    #10 0x55bbe30401c4 in _start (/home/kuba/tmp/qtrvsim/build/Debug/target/qtrvsim_gui+0xa851c4)

0x60e000127fc0 is located 0 bytes inside of 152-byte region [0x60e000127fc0,0x60e000128058)
freed by thread T0 here:
    #0 0x7f5afb3c322f in operator delete(void*, unsigned long) ../../../../src/libsanitizer/asan/asan_new_delete.cpp:172
    #1 0x55bbe3357446 in StaticTable::~StaticTable() /home/kuba/tmp/qtrvsim/src/gui/statictable.h:80
    #2 0x7f5afa25ca6d in QObjectPrivate::deleteChildren() (/lib/x86_64-linux-gnu/libQt5Core.so.5+0x2e4a6d)

previously allocated by thread T0 here:
    #0 0x7f5afb3c21c7 in operator new(unsigned long) ../../../../src/libsanitizer/asan/asan_new_delete.cpp:99
    #1 0x55bbe30beeb9 in CsrDock::CsrDock(QWidget*) /home/kuba/tmp/qtrvsim/src/gui/windows/csr/csrdock.cpp:8
    #2 0x55bbe3246769 in MainWindow::MainWindow(QSettings*, QWidget*) /home/kuba/tmp/qtrvsim/src/gui/mainwindow/mainwindow.cpp:73
    #3 0x55bbe3241187 in main /home/kuba/tmp/qtrvsim/src/gui/main.cpp:37
    #4 0x7f5af9411d8f in __libc_start_call_main ../sysdeps/nptl/libc_start_call_main.h:58

SUMMARY: AddressSanitizer: heap-use-after-free /usr/include/x86_64-linux-gnu/qt5/QtCore/qscopedpointer.h:60 in QScopedPointerDeleter<StaticTable>::cleanup(StaticTable*)
Shadow bytes around the buggy address:
  0x0c1c8001cfa0: fa fa fa fa fd fd fd fd fd fd fd fd fd fd fd fd
  0x0c1c8001cfb0: fd fd fd fd fd fd fd fd fa fa fa fa fa fa fa fa
  0x0c1c8001cfc0: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd
  0x0c1c8001cfd0: fd fd fd fd fa fa fa fa fa fa fa fa fd fd fd fd
  0x0c1c8001cfe0: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd
=>0x0c1c8001cff0: fa fa fa fa fa fa fa fa[fd]fd fd fd fd fd fd fd
  0x0c1c8001d000: fd fd fd fd fd fd fd fd fd fd fd fa fa fa fa fa
  0x0c1c8001d010: fa fa fa fa fd fd fd fd fd fd fd fd fd fd fd fd
  0x0c1c8001d020: fd fd fd fd fd fd fd fd fa fa fa fa fa fa fa fa
  0x0c1c8001d030: fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd fd
  0x0c1c8001d040: fd fd fd fd fa fa fa fa fa fa fa fa fd fd fd fd
Shadow byte legend (one shadow byte represents 8 application bytes):
  Addressable:           00
  Partially addressable: 01 02 03 04 05 06 07 
  Heap left redzone:       fa
  Freed heap region:       fd
  Stack left redzone:      f1
  Stack mid redzone:       f2
  Stack right redzone:     f3
  Stack after return:      f5
  Stack use after scope:   f8
  Global redzone:          f9
  Global init order:       f6
  Poisoned by user:        f7
  Container overflow:      fc
  Array cookie:            ac
  Intra object redzone:    bb
  ASan internal:           fe
  Left alloca redzone:     ca
  Right alloca redzone:    cb
  Shadow gap:              cc
==15235==ABORTING

I'm building QtRvSim against Qt 5.15.3+dfsg-2 in Ubuntu repositories.

If I understand the issue correctly, the StaticTable and QScrollArea instances stored in CsrDock are destructed via two mechanisms:

• the first one is the builtin Qt one - parent widget calls delete on its children,
• the second one is the automatic memory management provided by Box<>/QScopedPointer<>.

Implement status bar with full path (ellipsis on left if there is not enough space), current line number and column number.

Add line numbers to editor (see qt tutorial on qtextedit). Add option to hide them.

Displaying only address (effectively) in useless. Copy behavior of "Code" column. Maybe also for break points.

• Update memory model
  • User read and write methods with void pointer and variable buffer size (easier for mmap, for system calls emulation, ELF image writing to memory)
  • Use plain byte addressable backend - it allows to support big and little endian architectures easier and mix of endianness between emulated CPU and host
  • Update cache to work above new model
  • Update peripherals to work above new model, add endian switch to memory backend and frontend objects
• Introduce Address a RegisterValue types to allow 64-bit RISC-V support one day
• Move components to "src" subdirectory
• RISC-V core
  • Rename objects and file names to be more architecture neutral or switch to RISC-V names
  • Decide source of instruction encoding (QtMips used GNU binutils, C converted by Python to Python, then Python simarch )
  • Switch field names to match RISC-V ISA documents
  • Rewrite ALU to support RISC-V operations and GPR file
  • Consider floating point data path and vector unit communication with GPR
  • #27
  • Update interstage buffers/registers in machine::Core
  • instruction arguments description ArgumentDesc
  • Unit for immediate decode
  • Switch/generate RISC-V instruction description table
  • Update branch processing, switch to flush after branch, decide where to process branches (Decode or Execute after ALU)
  • Decode instruction length (Compressed code) and appropriate PC increment
  • Replace COP0 by machine registers
  • Update resolution of exceptions
  • Update unit tests
  • Update complex assembler based testcases
• Update core visualization
  • Update existing core visualization to roughly match RISC-V
  • Consider switch of core visualization to SvgScene, old one
  • Update memory view - NOTHING TO DO
  • Update register views
  • Update instruction view, what to to with 16/32 bit resync
  • DWARF mapping between instruction address and source line
• Update templates and examples
  • Add more advanced examples into repository.
  • Build examples with CMake ???
• System calls emulation update
  • Switch stream/file backends to QIODevice
  • Update serial port to QIODevice
  • Update systemcalls to QIODevice
  • Update systemcalls to RISC-V codes and parameters, get rid of delay slot
  • Rewrite mmap to utilize new memory model and map real files on Linux and Windows
• Update all documentation and teaching materials
  • Update README
  • Update B35APO pages
• Packaging and make system
  • CMake
    • Test on Linux
    • Test on Emscripten
    • Test on Windows MingW
    • Test on MacOS
  • SUSE Open Build service
  • UBUNTU Lauchpad
  • Nix
  • Guix
  • macOS (brew)
  • ??? for Window (choco?, winget?, store?, pkg)
• Advanced topics
  • Branch predictor
  • L2/Ln cache
  • MMU
  • Multicore
  • Extend cache states for MESI/MOESI
  • Visualization of coherence protocols
  • Visualization of instruction decode (fields)

Relevant files:
core.cpp
machine.cpp
machineconfig.h
predictor.cpp
pipeline.h

Just because many project I'm currently contributing changed from the master to main branch, would it be option, as I know how much meaningless it is? What you think? (no feelings hurt if you don't want to 😆 )

Repeated/permuted arguments

If the argument name is a number (starts with a digit), it is a reference to one of the arguments to the left of the current argument.

Parsing

TODO: Should it parse the argument again or reuse the parsed result - there might be a problem with relocations.

This requires access to previous arguments.

Decoding

Needs to detect reuse (duplication) of an argument.
Permutations cannot be detected.

Literal values

Literal values will be considered to be part of the (pseudo)instruction code.

More complex pseudo instructions

• decodes into multiple instructions
• uses symbolic value like XLEN

Probably handled ad hoc.

• modify GUI
• change code naming
• implement instructions to use the register

How to reproduce, open Window Memory and Peripherals block. Enter address 0xffffc120 into Memory Widow location and turn the some of RGB knobs. The value on the address 0xffffc124 should update correspondingly. But it updates only when I click into memory window or step over memory load or store instruction.

The same problem is in UART when the character is entered into terminal input.

Reported by @hollmmax

Ideally, the project could be compiled just by running make/make release/make debug, without having to fiddle with CMake.

In web version, I found the number of sets is 99 max ,it is same in the other version?

Hangs forever

Description

Accept all argument formats or at least those that GAS recognizes.

Example

jalr x0, x0, 0

yields "number of arguments does not match", while

jalr x0, 0(x0)

gets accepted. See lines 374 and 375 here.

Modify the unit tests present in https://github.com/cvut/qtrvsim/tree/master/src/machine/tests to work with RISC-V.

• Implement each tested component in separate file. See https://github.com/cvut/qtrvsim/blob/master/src/machine/execute/alu.test.h and https://github.com/cvut/qtrvsim/blob/master/src/machine/CMakeLists.txt:94.
• Memory and cache should be OK, just move it.

Proposal

Implement GNU assembler's RISC-V Assembler Modifiers

MWE

.globl _start

.text

_start:

lui a0, 0xABAD1
addi a0, a0, %lo(0xDEA)
ebreak

Expected Behavior

Successful compilation

Actual Behavior

test.S:8:argument parse error
test.S:8:expression parse error Unknow character "" in expression. at line 8, expression (nullptr).

Currently, the actions in the "Windows" menu (also available through the assigned hotkeys) add the sidebar/window when pressed, but to hide it, you have to click the "X" button at the top of the window with a mouse. The only exception is the "Core View" action, which works as a checkbox and toggles visibility of the core view.

In most software with similar layout (e.g. IDEs), pressing the same button/hotkey again hides the window, which lets you avoid using the mouse. I believe it would be more intuitive to make all the actions in the "Windows" menu work similarly to the "Core view" button, allowing the user to hide the window with the same action.