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A speculative mechanism to accelerate long-latency off-chip load requests by removing on-chip cache access latency from their critical path, as described by MICRO 2022 paper by Bera et al. (https://arxiv.org/pdf/2209.00188.pdf)

Home Page: https://arxiv.org/abs/2209.00188

License: MIT License

Makefile 0.12% Shell 0.61% C++ 64.77% C 2.50% Perl 25.51% XS 5.68% Roff 0.78% Python 0.04%
cache computer-architecture machine-learning perceptron perceptron-learning-algorithm prefetching microarchitecture

hermes's Issues

Asking for Experiments Results

Hi all,
It's great to know this project and the github instructions are in great detailed.
We are working on research and trying to replicate their results; however, the experiments take forever for us to get the result.
I'm wondering could you kindly share the CSV files rollup.csv and rollup_mcpat.csvwith us so that we can start to analyze the results.

It's will be really helpful if you can sent those files to my email: [email protected] or whatever way you feel comfortable.
Thank you.

Small typo in the main README.md file

Hello,

While browsing the project, I noticed a small typo in the README.md file. The first sentence on line 98 reads Build Hermes the using build script as follows. I bet it should better be something like Build Hermes using build script as follows.

4. Build Hermes the using build script as follows. This should create the executable inside `bin` directory.

Best!

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