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pycortexmdebug's Issues

Case-insensitive matching for peripheral and register names

Tab completion is already case insensitive, but if I type the whole peripheral or register name, it doesn't work. I hacked in something by using 'upper()', but it wasn't very good. I also tried to subclass OrderedDict to make a case insensitive version, but I'm not good enough at python and I had to give up for now. I just wanted to file an issue so I'll think about it again in the future.

Suggestions for how to best implement much appreciated!

SVDRegisterCluster instance has no attribute 'parent'

container = cluster.parent.name + ' > ' + cluster.name

In the above line there is an error causing gdb to print this error:

Python Exception <type 'exceptions.AttributeError'> SVDRegisterCluster instance has no attribute 'parent': 
Error occurred in Python: SVDRegisterCluster instance has no attribute 'parent'

when accessing register cluster.

Tested on nrf52840 chip + black magic probe. With command:

svd POWER RAM[0]

changing line 273 to:

container = peripheral.name + ' > ' + cluster.name

solves the issue

Errors when output-radix not 10

Example:

(gdb) set output-radix 16
(gdb) svd TB6
Registers in TB6:
Python Exception <type 'exceptions.ValueError'> invalid literal for int() with base 10: '0x0\n': 
Error occurred in Python command: invalid literal for int() with base 10: '0x0\n'

It sure didn't like that. I'll see what I can do to fix. My ultimate goal was to have the PyCortexMDebug stuff work properly with the current gdb radix setting, so I don't have to type svd/x all the time.

Refactor and cleanup

Get rid of tabs and make it more maintainable. Comment things more. Maybe type hints (thus ditching Python 2 support) Is anyone still using Python 2?

I started on the refactor and will merge in once I've at least tested that it runs.

Unexpected Negative Values

Using STM32H743x.svd from STMicro, many of the registers/fields read out as negative values, which I was not expecting (seems to affect a few registers in every peripheral, I haven't found a specific pattern).

Example (registers in Flash):

svd/x Flash
...
        OPTCCR:      (not readable)  FLASH option clear control register
        PRAR_CUR1:       0x000000FF  FLASH protection address for bank 1
        PRAR_PRG1:       0x000000FF  FLASH protection address for bank 1
        SCAR_CUR1:      0x-7FFFFF01  FLASH secure address for bank 1
        SCAR_PRG1:      0x-7FFFFF01  FLASH secure address for bank 1 
...

Fields in example register which reads negative (Flash, SCAR_CUR from above):

svd/x Flash SCAR_CUR1
Fields in Flash SCAR_CUR1:
        SEC_AREA_START1:  0x0FF  Bank 1 lowest secure protected address
        SEC_AREA_END1:    0x000  Bank 1 highest secure protected address
        DMES1:              0x1  Bank 1 secure protected erase enable option status bit

derivedFrom registers don't seem to work.

given this official example

<register>
  <name>TimerCtrl0</name>
  <description>Timer Control Register</description>
  <addressOffset>0x0</addressOffset>
  <access>read-write</access>
  <resetValue>0x00008001</resetValue>
  <resetMask>0x0000ffff</resetMask>
  <size>32</size>
</register>
<register derivedFrom="TimerCtrl0">
  <name>TimerCtrl1</name>
  <description>Derived Timer</description>
  <addressOffset>0x4</addressOffset>
</register>

I put together this svd construction/snippet:

        <register>
          <name>CRG_PLL0</name>
          <description>APLL configuration register 0</description>
          <addressOffset>0x0</addressOffset>
          <resetValue>0x12000000</resetValue>
          <fields>
            <field>
              <name>postdiv2</name>
              <description>Level-2 output divider of the PLL</description>
              <bitRange>[30:28]</bitRange>
              <access>read-write</access>
            </field>
            <field>
              <name>postdiv1</name>
              <description>Level-1 output divider of the PLL</description>
              <bitRange>[26:24]</bitRange>
              <access>read-write</access>
            </field>
            <field>
              <name>frac</name>
              <description>Decimal divider of the PLL</description>
              <bitRange>[23:0]</bitRange>
              <access>read-write</access>
            </field>
          </fields>
        </register>
        <register derivedFrom="CRG_PLL0">
          <name>CRG_PLL2</name>
          <description>DPLL configuration register 0</description>
          <addressOffset>0x8</addressOffset>
          <resetValue>0x14000000</resetValue>
        </register>

but trying to access it in gdb errors out:

(gdb) svd CRG CRG_PLL2
Fields in CRG > CRG_PLL2:
Python Exception <class 'ValueError'>: max() arg is an empty sequence
Error occurred in Python: max() arg is an empty sequence
Fields in CRG > CRG_PLL0:
        postdiv2:       0x1  Level-2 output divider of the PLL
        postdiv1:       0x2  Level-1 output divider of the PLL
        frac:      0x000000  Decimal divider of the PLL

ModuleNotFoundError: No module named 'cmdebug' when sourcing in gdb

Hello @bnahill and co developers

Thanks for this tool. I came across it in this Interrupt blog. So I cloned the repo, installed it with python3 with setup.py. Then in gdb I tried

source ~/PyCortexDebug/cmdebug/svd_gdb.py

which gives the following error

Traceback (most recent call last):
  File "~/PyCortexDebug/cmdebug/svd_gdb.py", line 26, in <module>
ModuleNotFoundError: No module named 'cmdebug'

Any obvious thing that I am missing? Thanks.

unsupported operand type(s) for /: 'lxml.objectify.StringElement' and 'int' when attempting to use the `svd` command

I get the error mentioned in the title when attempting to read out any peripheral register. I suspect that this might be SVD dependent but I can reproduce this with the STM32L4x6.svd from cmsis-svd.

This error seems to be raised here as a result of the size field of a register being parsed as a string rather than an integer.

Here is a patch that fixes this for me. I'm not sure if that is the right solution though since it feels kinda hacky

diff --git a/cmdebug/svd.py b/cmdebug/svd.py
index fc5eb99..8364454 100755
--- a/cmdebug/svd.py
+++ b/cmdebug/svd.py
@@ -383,6 +383,9 @@ class SVDPeripheralRegister:
                 for f in fields:
                     self.fields[str(f.name)] = SVDPeripheralRegisterField(f, self)
 
+        if type(self.size) is not int:
+            self.size = int(str(self.size), 0)
+
     def refactor_parent(self, parent: SVDPeripheral) -> None:
         self.parent_base_address = parent.base_address
 

The strange thing about this is that I remember that I didn't have this issue before. I unfortunately don't really remember what I changed about my setup since then.

Windows 10: No module named 'pkg_resources'

Using this project on Windows 10 with Python 3.12.3

When source svd scripts, report errors:

(gdb) source PyCortexMDebug/cmdebug/svd_gdb.py
Traceback (most recent call last):
  File "c:\users\403283\scoop\apps\xpack-gcc-arm-none-eabi\current\arm-none-eabi\share\gdb/python\gdb\__init__.py", line 147, in _execute_file
    exec(compiled, globals, globals)
  File "PyCortexMDebug/cmdebug/svd_gdb.py", line 23, in <module>
    import pkg_resources
ModuleNotFoundError: No module named 'pkg_resources'

SVD accessType is not respected

CMSIS SVD schema defines an access field of type accessType:
https://arm-software.github.io/CMSIS_5/SVD/html/schema_1_2_gr.html

Valid values are read-only, write-only, read-write, writeOnce, and read-writeOnce.

When a peripheral register has access == write-only, printing that register causes a bus fault. In my case, the TDR register in the LPSPI peripherals on the NXP S32K part are write-only. Printing the state of the LPSPI0 triggers a bus fault when attempting to do something like svd LPSPI0.

Python2 compatibility

The tar balls of cross-compilers tend to come nowadays with python support, e.g. arm-none-eabi-gdb-py, but this not yet the case for python3, there's no arm-none-eabi-gdb-py3 binary.

This means that your much appreciated code won't work out of the box for developers who don't compile their cross-compilers themselves.

The following commit is still python-2 compatible:

git checkout 76fe009847a3551ee56e75d4d0fa340977943c24

However, maybe it's nice to tag that release (or maybe a later release which is still not python3) and indicate that towards the users of this repository in the README.md? Or alternatively, create a python2 branch and cherry-pick a few of the bugs that have been fixed over time.

Thanks for your work, much appreciated!

LPC176x5x_v0.2.svd fails to load

Commit 98fd8c1 introduced a regression and I'm no longer able to parse the LPC17x5x_v0.2.svd file.

Upon loading It prints:

Could not load SVD file ../scripts/gdb/LPC176x5x_v0.2.svd : no such child: value...

This commit introduce major changes, I'll investigate it further to identify where exactly the bug is.

Consolidate source files

If I don't have pysvd.py in the current working directory, I get errors when trying to use gdb_svd. I've solved this problem in two ways:

  1. set PYTHONPATH in gdb's environment, so gdb_svd.py knows where to find pysvd.py.
  2. change the sys.path.append('.') line in gdb_svd.py to point to the directory where pysvd.py is located.

Neither of these is really ideal - is consolidating both into a single source file the only way to solve the problem?

hand crafted svd won't load.

Hello. Doing some u-boot development for a hisilicon soc. No SVD exists for it (and
I really doubt they ever exist for cortex-a socs with an mmu) so I wrote my own
(well, I wrote it in yaml and used svdtools to convert it to xml), since at that point in
bootup its much more like an MCU.
My method of use:

  1. clone this repo into the root of the u-boot repo
  2. open gdb/connect to openocd/etc
  3. source PyCortexMDebug/scripts/gdb.py
  4. svd_load hi3516dv300.svd

result:

(gdb) source PyCortexMDebug/scripts/gdb.py
(gdb) svd_load hi3516dv300.svd
Loading SVD file hi3516dv300.svd...
Could not load SVD file hi3516dv300.svd : None...

hi3516dv300.svd.gz

All svd files seem invalid

I tried your project but I have had some troubles with the svd_load function which seems to reject all svd files that I found.
To be more precise, I cloned your repository, start gdb in the repos root folder and run:

(gdb) source cmdebug/svd_gdb.py
(gdb) svd_load ../cmsis-svd/data/TexasInstruments/TM4C1230H6PM.svd
Loading SVD file ../cmsis-svd/data/TexasInstruments/TM4C1230H6PM.svd...
Error loading file ../cmsis-svd/data/TexasInstruments/TM4C1230H6PM.svd

The folder ../cmsis-svd/ is the git repository https://github.com/posborne/cmsis-svd. I have tried various files from there, but all of them result in the same outcome. I have also tried this with my stock gdb:

$ gdb --version
GNU gdb (GDB) Fedora 7.12.1-48.fc25

and arm-none-eabi-gdb-py from ARM:

$ arm-none-eabi-gdb-py --version
GNU gdb (GNU Tools for ARM Embedded Processors 6-2017-q1-update) 7.12.1.20170215-git

Both produce the same outcome.

Thank you in advance,
Dan

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