This project involves the design and implementation of a six-instruction processor using Verilog. The processor features a controller with instruction memory, program counter, and registers, along with a datapath that includes data memory, a register file, and a gate-level ALU.
-
Controller: Manages the flow of instructions and controls the operation of the datapath components.
- Instruction Memory: Stores the instructions to be executed by the processor.
- Program Counter (PC): Keeps track of the address of the next instruction to be executed.
- Registers: Temporary storage for data and addresses.
-
Datapath: Performs the data processing operations.
- Data Memory: Stores the data used and produced by the instructions.
- Register File: A set of registers used to store intermediate values and operands.
- ALU (Arithmetic Logic Unit): Performs arithmetic and logic operations at the gate level.
The processor supports the following six instructions:
MOV Ra, d
: Move datad
to registerRa
.MOV d, Ra
: Move data from registerRa
to memory locationd
.ADD Ra, Rb, Rc
: Add the values in registersRb
andRc
, and store the result in registerRa
.MOV Ra, #C
: Move constantC
to registerRa
.SUB Ra, Rb, Rc
: Subtract the value in registerRc
from the value in registerRb
, and store the result in registerRa
.JMPZ Ra, offset
: Jump to the instruction at the addressPC + offset
if the value in registerRa
is zero.
Comprehensive simulation tests were conducted to validate the processor's functionality. These tests involved:
- Setting specific values in the instruction and data memories.
- Executing a variety of instruction scenarios.
- Verifying the expected outcomes for each scenario.