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View Code? Open in Web Editor NEWassorted library of utility cores for amaranth HDL
License: Other
assorted library of utility cores for amaranth HDL
License: Other
Hi, I'm using this to talk to the ADC on a ULX3S dev board - and it doesn't seem to work. My hand crafted SPI module does work. The issue is that the comms returning from the ADC are garbage - not sure if that's because tx or rx or both are being mangled. My suspicion is that its caused by the sub-SPI-clk glitch that can be seen before and after the CS line transitions.
I noticed this on my logic analyser (the values from which agree with the values the fpga returns), and they can be seen in the attached test script.
import math
from amaranth import *
from amaranth.sim import *
from amlib.io import SPIControllerInterface
if __name__ == '__main__':
word_size = 16
divisor = 4
clock_polarity = 1
clock_phase = 1
msb_first = True
cs_idles_high = True
spi = SPIControllerInterface(word_size=word_size, divisor=divisor,
clock_polarity=clock_polarity, clock_phase=clock_phase,
msb_first=msb_first, cs_idles_high=cs_idles_high)
m = Module()
m.submodules.spi = spi
sim = Simulator(m)
def process():
yield spi.word_out.eq(0x1234)
yield
yield spi.start_transfer.eq(1)
for x in range(4*16+12):
yield
sim.add_sync_process(process)
sim.add_clock(1.0/50e6)
with sim.write_vcd("test.vcd"):
sim.run()
Upon doing an import, I get the following warning printed:
from amlib import io
/usr/local/lib/python3.9/dist-packages/amlib-0.1.dev140+g57f341a-py3.9.egg/amlib/utils/ringoscillator.py:10: SyntaxWarning: assertion is always true, perhaps remove parentheses?
When calling connect_to_resource
on a SPIRegisterInterface (and probably also on the other SPI*Interface:s), I get the following error:
AttributeError: 'SPIRegisterInterface' object has no attribute 'spi_bus_out'
This appears to be something left over and not tested so far?
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