Comments (3)
Confirmed; it's fine now.
from nsimd.
Indeed. I'm fixing this. Thanks for the report.
from nsimd.
Should be fixed by now. I've already merged the PR. Could you try it again and confirm that it's working as intended? I'll close right after. Thanks.
from nsimd.
Related Issues (20)
- Performance different on X86 and ARM service HOT 2
- Vector<nsimd::pack<T>> HOT 4
- Support Reg Size /2 HOT 1
- NSIMD generates too much assembly HOT 5
- There is not ‘&’ bitwise operator for ’packl‘ type and no conversion of 'pack' and 'packl' type
- nsimd defines `i64` etc. in global namespace HOT 3
- Provide a C11 API for core
- NSIMD SVE intrinsics generates movprfx HOT 3
- Provide cbrt HOT 1
- Provide += operators etc.
- mask_for_loop_tail produces scalar code HOT 2
- Provide fabs, fmax, fmin HOT 2
- Use Sleef math functions to complete NSIMD
- Provide more "inline" operators such as copysign, isfinite, etc... HOT 2
- Implement a `flipsign` function HOT 1
- Provide a constexpr size function HOT 4
- Compile nsimd-2.2 on the ARM server HOT 2
- Document "andnot"
- Calculate i32 horizontal sum in nsimd. HOT 3
- Feature request: allow logical arguments for if_else1 HOT 2
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