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30-days-of-javascript

30 days of JavaScript programming challenge is a step by step guide to learn JavaScript programming language in 30 days

30-days-of-python

30 days of Python programming challenge is a step by step guide to learn Python programming language in 30 days.

ahb3lite_apb_bridge

Parameterised Asynchronous AHB3-Lite to APB4 Bridge.

alios-things

AliOS Things latest version: https://github.com/alibaba/AliOS-Things/tree/master Please go to https://www.aliyun.com/product/aliosthings to get your minimal code.

babassl

A Brisk and Better Assured Cryptographic Toolkit

bl_mcu_sdk

bl_mcu_sdk is MCU software development kit provided by Bouffalo Lab Team for BL602/BL604, BL702/BL704/BL706 and other series of RISC-V based chips in the future.

bluetooth_stack

这是一个开源的双模蓝牙协议栈(bluetooth.stack)(btstack),可以运行在STM32,Linux.，包含HCI,L2CAP,SDP,RFCOMM,HFP,SPP,A2DP,AVRCP,AVDTP,AVCTP,OBEX,PBAP等协议，后续会继续维护，以达到商用的目的

btstack

Dual-mode Bluetooth stack, with small memory footprint.

chattts

ChatTTS is a generative speech model for daily dialogue.

chisel3

Chisel 3: A Modern Hardware Design Language

chrom_bookmark

cmsdk_ahb_busmatrix

practice configure AHB-Lite bus protocol

cmsis-svd

Aggegration of ARM Cortex-M (and other) CMSIS SVDs and related tools

cmsis_5

CMSIS Version 5 Development Repository

cv32e40p

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

cvfpu

Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

delta-sigma-adc-verilog

Delta-sigma ADC,PDM audio FPGA Implementation

delta-sigma-dac-verilog

Delta Sigma DAC FPGA

freedom

Source files for SiFive's Freedom platforms

giibiiadvance

A GB, GBC and GBA emulator with GB Camera support.

git_test

hdl-benchmarks

Collection of open HDL modules, subsystems and microprocessors (benchmarks) that are used for related tools testing.

hello-world

Just an test repository

ibex

Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

iic-audiodac-v1

Delta-sigma audio DAC (16b, 48kHz), intended for tape-out on MPW-5, SKY130 technology.

jpeg-core_jpeg

High throughput JPEG decoder in Verilog for FPGA

jpeg-jpeg-decoder

Verilog Code for a JPEG Decoder

jpeg-python

JPEG encoder/decoder written in Python

jpegencode

JPEG Encoder Verilog

jpegencoder4cortex-m

JPEG Encoder for Cortex-M