Comments (1)
The work for this has been completed in the smt
branch, but has been put on hold due to the development of more complex exception handling and the new memory interface. As exceptions currently pause the entire core until handled, this would result in the undesirable halting of other threads. This system would likely need to be redesigned to pause only the exception-raising thread while allowing the others to continue.
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Related Issues (20)
- Missing Instruction: NEON movi HOT 1
- miniBUDE output Error HOT 1
- Compilation fails on '::getdents64' HOT 3
- Unrecognized instruction of opcode 2792 (ror) HOT 1
- Occasional sysreg_access test failure HOT 1
- Cannot run CloverLeaf Serial and OpenMP HOT 6
- Modify Instruction_Execute Helper Functions HOT 1
- SVE dup instructions do not process Immediate correctly.
- Change RegisterValue instantiation throughout to make code more readable.
- Move Virtual Counter Timer and Processor Cycle Counter from main.cc
- Add Predicate pattern recognition to other SVE instructions
- Left shift of negative value is UB for `AArch64_SSHLLv2i32_shift` HOT 3
- `RegressionTest::getMemoryValue` does not assert for alignment/aliasing, triggers SIGSEGV/SIGBUS in ASan HOT 1
- `Architecture::predecode` leaks memory for every core tick HOT 3
- Misleading `std::move` in `DispatchIssueUnit::forwardOperands`
- Memory leak in `Linux::getdents64` HOT 1
- Use clang-tidy for static analysis
- Instruction trace HOT 2
- Can't not run SME code on SimEng HOT 9
- Use raw string literal for `DEFAULT_CONFIG` in ModelConfig.hh
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