Comments (2)
Having had a peek, the problem was even greater than this — per the relevant typo I'm pretty sure the extra cycle was being skipped where the target page is equal to the relative jump, e.g. BRA $03
would skip a cycle if the target was in page $03
. Very dumb.
The linked pull request is intended to fix the problem, though I've yet to do any manual verification.
from processortests.
PR #30 makes all the branch instruction tests pass in my emulator now
from processortests.
Related Issues (20)
- NES 6502 Incorrect Cycles test HOT 1
- JSR high byte issue HOT 3
- 65816: DBR should not be reset on BRK/COP in emulation mode
- 65816: Emulation mode stack wrapping HOT 2
- 65816: (dp,x) emulation mode page wrapping
- 65816: More emulation mode stack wrapping HOT 2
- Possible wrong cycle count for NES 6502 0C and 1/3/5/7/D/FC HOT 4
- 8088 Test Suite HOT 4
- Inconsistency of the negative flag in decimal mode across 6502 emulators HOT 2
- nes6502 README.md has incorrect sample HOT 1
- 8088 8D instruction (LEA) test has LEA r, r forms. HOT 4
- The 6502 tests assume the P register has bits 4 & 5.
- Opcode 6B Respects D Flag on NES Tests
- Opcode 9C/9E: nes6502 Result Inconsistent with Test ROM HOT 2
- 8088: some `name`s refer to `si` but should refer to `di` HOT 7
- 6502: JSR Overwriting Instruction HOT 3
- Possibly wrong test case d133 [ADD.b D0, (d8, A3, Xn)] HOT 2
- 68000: Suggestion for additional DIVS/DIVU test cases
- Test case issue `5ca0` `ADD.l Q, -(A0)` HOT 2
- 65816: missing coverage for zero flag in 16-bit adds
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from processortests.