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T. Meissner's Projects

awesome icon awesome

A curated list of awesome resources for HDL design and verification

cocotb icon cocotb

Coroutine Co-simulation Test Bench

cocotb_with_ghdl icon cocotb_with_ghdl

Examples of using cocotb for functional verification of VHDL designs with GHDL.

constraints icon constraints

Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards

containers icon containers

Building and deploying container images for open source electronic design automation (EDA)

ghdl icon ghdl

VHDL 2008/93/87 simulator

learning-by-doing icon learning-by-doing

Learning by doing: Reading books and trying to understand the (code) examples

libvhdl icon libvhdl

Library of reusable VHDL components

neorv32 icon neorv32

🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

neorv32-formal icon neorv32-formal

Formal verification (experiments) targeting the NEORV32 RISC-V processor.

neorv32-setups icon neorv32-setups

📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.

osvvm icon osvvm

Open Source VHDL Verification Methodology (OSVVM) Repository

psl_with_ghdl icon psl_with_ghdl

Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)

usb-avr-cpld icon usb-avr-cpld

usb-avr-cpld experiment board with FTDI FT232RL, ATMEGA88 & XC9572XL

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