Comments (4)
this is a known issue. we're working it. RISC-V doesn't fully support portions of the ELF spec
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I am changing that to P0 because it is super annoying to deal with as we work more and more with c++ code. This issue has huge negative impact for c++ applications: a) static members of a function cannot be initialized properly b) constructors of globally defined classed are never called.
Global class declaration:
class X {
public:
X() {
magic = 42;
}
int magic;
};
X x;
int main() {
assert(x.magic == 42);
return 0;
}
Static class member initialization:
class X {
public:
static int magic;
};
int X::magic = 42;
int main() {
assert(X::magic == 42);
return 0;
}
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feel free to start execution at _start
from rev.
I wasn't aware of the lack of .init/.fini sections on RV, but the same mechanism seems to be implemented on risc using .text and .plt sections.
I tried starting directly from _start, our libc runs calls set_tid_address syscall, I know that you are working on TLS support, would it be a problem to add support for this syscall, or should we try to do something on our end with it?
I briefly added a dummy set_tid_address syscall implementation and with that in place all three examples posted here work fine for us.
diff --git a/src/RevProc.cc b/src/RevProc.cc
index 6175d23..b76acc0 100644
--- a/src/RevProc.cc
+++ b/src/RevProc.cc
@@ -2412,6 +2412,7 @@ void RevProc::InitEcallTable(){
{93, &RevProc::ECALL_exit},
{94, &RevProc::ECALL_exit_group}, // Not implemented
{95, &RevProc::ECALL_waitid}, // Not implemented
+ {96, &RevProc::ECALL_set_tid_address}, // Not implemented
{99, &RevProc::ECALL_set_robust_list}, // Not implemented
{100, &RevProc::ECALL_get_robust_list}, // Not implementedt
{101, &RevProc::ECALL_nanosleep}, // Not implemented
@@ -2789,6 +2790,11 @@ void RevProc::ECALL_munmap(){
return;
}
+void RevProc::ECALL_set_tid_address(){
+ output->verbose(CALL_INFO, 2, 0, "ECALL: set_tid_address called\n");
+ return;
+}
+
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Related Issues (20)
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- fcvt.w.s does not support rounding modes HOT 8
- [FEATURE REQUEST] ifence HOT 1
- [FEATURE REQUEST] Support cache flush instructions HOT 1
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- Tracer is printing compressed register move instructions as c.jr instructions HOT 3
- [FEATURE REQUEST] Documentation HOT 3
- rev_read operation slowdown after large number of lines read HOT 2
- Stack buffer initialization corrupts memory. HOT 22
- lwsp instruction execution generating bad address outside of stack HOT 3
- dump_stack() system call returning only zeros
- [FEATURE REQUEST] Different testing levels HOT 4
- [FEATURE REQUEST] CSR Tracing
- [FEATURE REQUEST] Support signal and trap handling
- Store-conditional Interface (RevMem::SCBase) does not handle Len and Target correctly HOT 1
- Failed 'dep_check' test with cost of 'add' in RV32I larger than 1 HOT 2
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