Comments (2)
cheshmi
commented on June 23, 2024
It is based on the average memory cycle defined in the computer architecture book (see page 75).
PAPI does not give you all counters you will need, and it changes per architecture. We used something like below:
def compute_memory_cycle_for_one_group(row, arch_params):
dl1_miss = row['PAPI_L1_DCM'].values
dl2_miss = row['PAPI_L2_DCM'].values
dl3_miss = row['PAPI_L3_TCM'].values
dl1_access = row['PAPI_LST_INS'].values
l1_mr = dl1_miss / dl1_access
l2_mr = dl2_miss / dl1_miss
l3_mr = dl3_miss / dl2_miss
l1_access_cost = arch_params['L1_ACCESS_TIME']
l2_access_cost = arch_params['L2_ACCESS_TIME']
l3_access_cost = arch_params['L3_ACCESS_TIME']
mm_access_cost = arch_params['MAIN_MEMORY_ACCESS_TIME']
avg_mem_cycle = l1_access_cost + l1_mr*(l2_access_cost + l2_mr*(l3_access_cost + l3_mr*mm_access_cost))
exec_cycle = avg_mem_cycle * dl1_access
return exec_cycleYou will need some architecture parameters. You can improve the code by finding more accurate counters.
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learning-chip
commented on June 23, 2024
Thanks, that makes sense! I find that Vtune also provides an average latency metric, but it's good to calculate and verify it from scratch.
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