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synchronous_fifo

A simple synch FIFO designed in Verilog and verified in UVM methodology including scoreboards, coverage collector, also code coverage and functional coverage reports etc.

system-verilog-tasks

systemveriloguart

systolic-array-implementation-in-rtl-for-tpu

IC implementation of Systolic Array for TPU

test_core

A very simple test core.

testbenches

Testbenches for HDL projects

timer

A simple timer with prescaler written in Verilog

tiny_but_mighty_i2c_master_verilog

I2C Master Verilog module

tpu-tensor-processing-unit

IC implementation of TPU

trng

True Random Number Generator core implemented in Verilog.

uart

Universal Asynchronous Receiver / Transmitter design, and verification using UVM methodology.

uart-tx

implementing Universal Asynchronous Receiver/Transmitter [TX]

uart_

A Universal asynchronous receiver/transmitter (UART) implemented in Verilog.

uh-jls

FPGA-based Ultra-High Throughput JPEG-LS encoder, which provides lossless image compression. 一个超高性能的FPGA JPEG-LS编码器，用来进行无损图像压缩。

uniplug-fpga

体积小、低成本、易用、扩展性强的 FPGA 核心板

up_down_counter_4bit

implementation and test bench using System Verilog

ustc-rvsoc

An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V CPU+SoC，包含一个简单且可扩展的外设总线。

uvm_for_ahb_sramc

verilog-arbiter

A look ahead, round-robing parametrized arbiter written in Verilog.

verilog-axi

Verilog AXI components for FPGA implementation

verilog-axis

Verilog AXI stream components for FPGA implementation

verilog-cam

Verilog Content Addressable Memory Module

verilog-dsp

Verilog digital signal processing components

verilog-ethernet

Verilog Ethernet components for FPGA implementation

verilog-fixedpoint

A Verilog fixed-point lib: custom bit width, arithmetic, converting to float, with single cycle & pipeline version. 一个Verilog定点数库，提供算术运算、与浮点数的互相转换，包含单周期和流水线两种实现。

verilog-hdl-

Basic Verilog Coding

verilog-i2c

Verilog I2C interface for FPGA implementation

verilog-lfsr

Fully parametrizable combinatorial parallel LFSR/CRC module

verilog-pcie

Verilog PCI express components

verilog-sha-family

Verilog implementation of SHA1/SHA224/SHA256/SHA384/SHA512. 使用Verilog实现的SHA1/SHA224/SHA256/SHA384/SHA512计算器。