Sorry, I forget to tell you all the changes in CMakeLists.txt which is in the gemm_hls-master project:

Target options

set(MM_PART_NAME "xczu9eg-ffvb1156-2-e" CACHE STRING "Part name for HLS.")
set(MM_DSA_NAME "zcu102" CACHE STRING "DSA string for xocc.")
set(MM_TARGET_CLOCK 250 CACHE STRING "Target clock for kernel (<=0 uses DSA default).")
set(MM_TARGET_CLOCK_UNCERTAINTY 1.08 CACHE STRING "Clock uncertainty for HLS.")

Domain options

set(MM_DATA_TYPE "float" CACHE STRING "Matrix data type.")
set(MM_MEMORY_BUS_WIDTH_N 64 CACHE STRING "Width of memory bus in bytes in N.")
set(MM_MEMORY_BUS_WIDTH_K 64 CACHE STRING "Width of memory bus in bytes in K.")
set(MM_MEMORY_BUS_WIDTH_M 64 CACHE STRING "Width of memory bus in bytes in M.")
set(MM_DYNAMIC_SIZES CACHE OFF "Use dynamic matrix dimension sizes.")
set(MM_SIZE_N 1024 CACHE STRING "Size of matrix dimension.")
set(MM_SIZE_K 256 CACHE STRING "Size of matrix dimension.")
set(MM_SIZE_M 1024 CACHE STRING "Size of matrix dimension.")
set(MM_MEMORY_TILE_SIZE_N 256 CACHE STRING "Tile size of outer memory tile in N.")
set(MM_MEMORY_TILE_SIZE_M 256 CACHE STRING "Tile size of outer memory tile in M.")
set(MM_PARALLELISM_N 16 CACHE STRING "Number of parallel compute in N.")
set(MM_PARALLELISM_M 4 CACHE STRING "Number of parallel compute in M.")
set(MM_GRANULARITY_N 1 CACHE STRING "Granularity of processing elements in N.")

from gemm_hls.

Hi @yangjing69,

As a quick tip -- instead of changing the default parameters inside CMakeLists.txt, you can change the parameters for your build either by:

1. Call ccmake on the directory where you are building, e.g. ccmake ., and use the interactive tool.
2. Set them while calling cmake, like so: cmake <source dir> -DMM_SIZE_K=256

As for your error, it looks like an internal Vivado error: 'get_property' expects at least one object. It suggests that it is looking for objects that don't exist in the netlist produced by SDSoC.
Unfortunately I don't have access to an SoC device/license, so I cannot test this myself - I've only tried compiling for accelerators-type FPGAs (KU115, VU9P).

I found this forum post, which might be related:
https://forums.xilinx.com/t5/SDAccel/Building-ERROR-VPL-17-55-set-property-expects-at-least-one/td-p/893221
Could you check the logs that the guy in this post did?
Perhaps it's related to how DRAM is configured on the SoC boards.
You could try commenting out the following line on 154:
https://github.com/spcl/gemm_hls/blob/master/CMakeLists.txt#L154 (max memory ports)
As well as commenting out the lines setting the DIMMs from on line 176-188:
https://github.com/spcl/gemm_hls/blob/master/CMakeLists.txt#L176

from gemm_hls.

Hi,@definelicht
I tried commenting out the L154 and L176-L188 line codes in CMakeList.txt, but the problem is the same as before.
I checked the logs in runme.log file which in the path "../build/_x/link/vivado/prj/prj.runs/impl_1/runme.log" as below:
......
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
INFO: [Project 1-111] Unisim Transformation Summary:
A total of 388 instances were transformed.
DSP48E1 => DSP48E2 (DSP_ALU, DSP_A_B_DATA, DSP_C_DATA, DSP_MULTIPLIER, DSP_M_DATA, DSP_OUTPUT, DSP_PREADD_DATA, DSP_PREADD): 320 instances
RAM32M16 => RAM32M16 (RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMD32, RAMS32, RAMS32): 68 instances

41 Infos, 3 Warnings, 0 Critical Warnings and 0 Errors encountered.
link_design completed successfully
link_design: Time (s): cpu = 00:01:29 ; elapsed = 00:01:43 . Memory (MB): peak = 4021.840 ; gain = 2241.625 ; free physical = 6672 ; free virtual = 13332
[OPTRACE]|19570|14|/home/cvg/YJ/gemm_hls-master/build/_x/link/vivado/prj/prj.runs/impl_1/zcu102_wrapper.tcl|vivado_impl|1554952892792|END|link_design|
[OPTRACE]|19570|15|/home/cvg/YJ/gemm_hls-master/build/_x/link/vivado/prj/prj.runs/impl_1/zcu102_wrapper.tcl|vivado_impl|1554952892792|START|gray box cells|
[OPTRACE]|19570|16|/home/cvg/YJ/gemm_hls-master/build/_x/link/vivado/prj/prj.runs/impl_1/zcu102_wrapper.tcl|vivado_impl|1554952892792|END|gray box cells|
[OPTRACE]|19570|17|/home/cvg/YJ/gemm_hls-master/build/_x/link/vivado/prj/prj.runs/impl_1/zcu102_wrapper.tcl|vivado_impl|1554952892792|START|Design Initialization: post hook|
source /home/cvg/YJ/gemm_hls-master/build/_x/link/vivado/scripts/full_init_post.tcl
WARNING: [Vivado 12-508] No pins matched '/clk_wiz_0_clk_out1'.
INFO: [Timing 38-35] Done setting XDC timing constraints.
WARNING: [Vivado 12-1008] No clocks found for command 'get_clocks -of_objects [get_pins /clk_wiz_0_clk_out1]'.
Resolution: Verify the create_clock command was called to create the clock object before it is referenced.
INFO: [Vivado 12-626] No clocks found. Please use 'create_clock' or 'create_generated_clock' command to create clocks.
get_clocks: Time (s): cpu = 00:00:23 ; elapsed = 00:00:06 . Memory (MB): peak = 4021.840 ; gain = 0.000 ; free physical = 6356 ; free virtual = 13016
ERROR: [runtcl-1] ERROR: [Common 17-55] 'get_property' expects at least one object.
Resolution: If [get] was used to populate the object, check to make sure this command returns at least one valid object.
ERROR: [Common 17-39] 'send_msg_id' failed due to earlier errors.

INFO: [Common 17-206] Exiting Vivado at Thu Apr 11 11:21:38 2019...

from gemm_hls.

@yangjing69 Could you please try the following:

• Make a fresh (empty) build directory
• Make sure the memory port lines are still commented out
• Run CMake to configure again, with the parameters you need
• Run VERBOSE=1 make compile_hardware and VERBOSE=1 make link_hardware, and post the command executed by CMake here. For example:

% VERBOSE=1 make compile_hardware
/usr/bin/cmake -H/home/definelj/dev/gemm_io -B/home/definelj/dev/gemm_io/build --check-build-system CMakeFiles/Makefile.cmake 0
make -f CMakeFiles/Makefile2 compile_hardware
make[1]: Entering directory '/home/definelj/dev/gemm_io/build'
/usr/bin/cmake -H/home/definelj/dev/gemm_io -B/home/definelj/dev/gemm_io/build --check-build-system CMakeFiles/Makefile.cmake 0
/usr/bin/cmake -E cmake_progress_start /home/definelj/dev/gemm_io/build/CMakeFiles 0
make -f CMakeFiles/Makefile2 CMakeFiles/compile_hardware.dir/all
make[2]: Entering directory '/home/definelj/dev/gemm_io/build'
make -f CMakeFiles/compile_hardware.dir/build.make CMakeFiles/compile_hardware.dir/depend
make[3]: Entering directory '/home/definelj/dev/gemm_io/build'
cd /home/definelj/dev/gemm_io/build && /usr/bin/cmake -E cmake_depends "Unix Makefiles" /home/definelj/dev/gemm_io /home/definelj/dev/gemm_io /home/definelj/dev/gemm_io/build /home/definelj/dev/gemm_io/build /home/definelj/dev/gemm_io/build/CMakeFiles/compile_hardware.dir/DependInfo.cmake --color=
make[3]: Leaving directory '/home/definelj/dev/gemm_io/build'
make -f CMakeFiles/compile_hardware.dir/build.make CMakeFiles/compile_hardware.dir/build
make[3]: Entering directory '/home/definelj/dev/gemm_io/build'
XILINX_PATH=/home/definelj/dev/gemm_io/build /opt/Xilinx/SDx/2018.2/bin/xocc -c -t hw -s -I/home/definelj/dev/gemm_io/include -I/home/definelj/dev/gemm_io/hlslib/include -I/home/definelj/dev/gemm_io/build --kernel MatrixMultiplicationKernel --platform xilinx_vcu1525_dynamic_5_1 --xp prop:kernel.MatrixMultiplicationKernel.kernel_flags=" -std=c++11 -O3 -DMM_SYNTHESIS -DHLSLIB_SYNTHESIS" --max_memory_ports all -O3 --kernel_frequency 200 /home/definelj/dev/gemm_io/kernel/Compute.cpp /home/definelj/dev/gemm_io/kernel/Memory.cpp -o MatrixMultiplication_hw.xo

from gemm_hls.

Hi,@definelicht
I ran VERBOSE=1 make compile_hardware and VERBOSE=1 make link_hardware as below:
//----------------------------------------------------------------------------------------------
%VERBOSE=1 make compile_hardware
make[3]: 离开目录“/home/cvg/YJ/gemm_hls-master/build”
make -f CMakeFiles/compile_hardware.dir/build.make CMakeFiles/compile_hardware.dir/build
make[3]: 进入目录“/home/cvg/YJ/gemm_hls-master/build”
XILINX_PATH=/home/cvg/YJ/gemm_hls-master/build /media/cvg/DATA/ProgramFile/SDx/2018.2/bin/xocc -c -t hw -s -I/home/cvg/YJ/gemm_hls-master/include -I/home/cvg/YJ/gemm_hls-master/hlslib/include -I/home/cvg/YJ/gemm_hls-master/build --kernel MatrixMultiplicationKernel --platform zcu102 --xp prop:kernel.MatrixMultiplicationKernel.kernel_flags=" -std=c++11 -O3 -DMM_SYNTHESIS -DHLSLIB_SYNTHESIS" -O3 --kernel_frequency 250 /home/cvg/YJ/gemm_hls-master/kernel/Compute.cpp /home/cvg/YJ/gemm_hls-master/kernel/Memory.cpp -o MatrixMultiplication_hw.xo

****** xocc v2018.2 (64-bit)
**** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

Attempting to get a license: ap_opencl
WARNING: [XOCC 17-301] Failed to get a license for 'ap_opencl'. Explanation: The license feature ap_opencl could not be found.
Resolution: Check the status of your licenses in the Vivado License Manager. For debug help search Xilinx Support for "Licensing FAQ".
Attempting to get a license: ap_sdsoc
Feature available: ap_sdsoc
INFO: [XOCC 60-585] Compiling for hardware target
Running SDx Rule Check Server on port:44623
INFO: [XOCC 60-895] Target platform: /media/cvg/DATA/ProgramFile/SDx/2018.2/platforms/zcu102/zcu102.xpfm
INFO: [XOCC 60-423] Target device: zcu102
INFO: [XOCC 60-242] Creating kernel: 'MatrixMultiplicationKernel'

===>The following messages were generated while performing high-level synthesis for kernel: MatrixMultiplicationKernel Log file:/home/cvg/YJ/gemm_hls-master/build/_x/MatrixMultiplication_hw/MatrixMultiplicationKernel/vivado_hls.log :
INFO: [XOCC 204-61] Option 'relax_ii_for_timing' is enabled, will increase II to preserve clock frequency constraints.
INFO: [XOCC 204-61] Pipelining loop 'ReadA_N0_ReadA_K0_ReadA_N1_ReadA_N2'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 12.
INFO: [XOCC 204-61] Pipelining loop 'TransposeA_N0_TransposeA_K_L'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 4.
INFO: [XOCC 204-61] Pipelining loop 'ReadB_OuterTile_N_ReadB_K_ReadB_BufferB_M1'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 11.
INFO: [XOCC 204-61] Pipelining loop 'ConvertWidthB_Outer_ConvertWidthB_Memory'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 4.
INFO: [XOCC 204-61] Pipelining loop 'FeedB_OuterTile_N_FeedB_K_FeedB_Pipeline_N_FeedB_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 4.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'InitializeABuffer_Inner_InitializeABuffer_Outer'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 2.
INFO: [XOCC 204-61] Pipelining loop 'Collapse_K_Pipeline_N_Pipeline_M'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 21.
INFO: [XOCC 204-61] Pipelining loop 'WriteC_Flattened'.
INFO: [XOCC 17-14] Message 'XOCC 204-61' appears 100 times and further instances of the messages will be disabled.
INFO: [XOCC 60-594] Finished kernel compilation
INFO: [XOCC 60-244] Generating system estimate report...
INFO: [XOCC 60-1092] Generated system estimate report: /home/cvg/YJ/gemm_hls-master/build/_x/reports/MatrixMultiplication_hw/system_estimate_MatrixMultiplication_hw.xtxt
Add Instance ConvertWidthC ConvertWidthC_U0 552
Add Instance ConvertWidthB ConvertWidthB_U0 558
Add Instance ProcessingElement87 ProcessingElement87_U0 564
Add Instance ProcessingElement89 ProcessingElement89_U0 574
Add Instance ProcessingElement91 ProcessingElement91_U0 584
Add Instance ProcessingElement88 ProcessingElement88_U0 594
Add Instance ProcessingElement90 ProcessingElement90_U0 604
Add Instance ProcessingElement92 ProcessingElement92_U0 614
Add Instance ProcessingElement93 ProcessingElement93_U0 624
Add Instance ProcessingElement94 ProcessingElement94_U0 634
Add Instance ProcessingElement95 ProcessingElement95_U0 644
Add Instance ProcessingElement96 ProcessingElement96_U0 654
Add Instance ProcessingElement97 ProcessingElement97_U0 664
Add Instance ProcessingElement98 ProcessingElement98_U0 674
Add Instance ProcessingElement99 ProcessingElement99_U0 684
Add Instance ProcessingElement100 ProcessingElement100_U0 694
Add Instance ProcessingElement101 ProcessingElement101_U0 704
Add Instance ProcessingElement102 ProcessingElement102_U0 714
Add Instance ReadA ReadA_U0 721
Add Instance WriteC WriteC_U0 744
Add Instance ReadB ReadB_U0 752
Add Instance TransposeA TransposeA_U0 760
Add Instance FeedB FeedB_U0 781
Add Instance MatrixMultiplicationKernel_entry6 MatrixMultiplicationKernel_entry6_U0 787
INFO: [XOCC 60-586] Created MatrixMultiplication_hw.xo
INFO: [XOCC 60-791] Total elapsed time: 0h 1m 20s
make[3]: 离开目录“/home/cvg/YJ/gemm_hls-master/build”
Built target compile_hardware
make[2]: 离开目录“/home/cvg/YJ/gemm_hls-master/build”
/media/cvg/DATA/ProgramFile/SDK/2018.2/tps/lnx64/cmake-3.3.2/bin/cmake -E cmake_progress_start /home/cvg/YJ/gemm_hls-master/build/CMakeFiles 0
make[1]: 离开目录“/home/cvg/YJ/gemm_hls-master/build”
//----------------------------------------------------------------------------------------------
%VERBOSE=1 make link_hardware
/media/cvg/DATA/ProgramFile/SDK/2018.2/tps/lnx64/cmake-3.3.2/bin/cmake -H/home/cvg/YJ/gemm_hls-master -B/home/cvg/YJ/gemm_hls-master/build --check-build-system CMakeFiles/Makefile.cmake 0
make -f CMakeFiles/Makefile2 link_hardware
make[1]: 进入目录“/home/cvg/YJ/gemm_hls-master/build”
/media/cvg/DATA/ProgramFile/SDK/2018.2/tps/lnx64/cmake-3.3.2/bin/cmake -H/home/cvg/YJ/gemm_hls-master -B/home/cvg/YJ/gemm_hls-master/build --check-build-system CMakeFiles/Makefile.cmake 0
/media/cvg/DATA/ProgramFile/SDK/2018.2/tps/lnx64/cmake-3.3.2/bin/cmake -E cmake_progress_start /home/cvg/YJ/gemm_hls-master/build/CMakeFiles 0
make -f CMakeFiles/Makefile2 CMakeFiles/link_hardware.dir/all
make[2]: 进入目录“/home/cvg/YJ/gemm_hls-master/build”
make -f CMakeFiles/link_hardware.dir/build.make CMakeFiles/link_hardware.dir/depend
make[3]: 进入目录“/home/cvg/YJ/gemm_hls-master/build”
cd /home/cvg/YJ/gemm_hls-master/build && /media/cvg/DATA/ProgramFile/SDK/2018.2/tps/lnx64/cmake-3.3.2/bin/cmake -E cmake_depends "Unix Makefiles" /home/cvg/YJ/gemm_hls-master /home/cvg/YJ/gemm_hls-master /home/cvg/YJ/gemm_hls-master/build /home/cvg/YJ/gemm_hls-master/build /home/cvg/YJ/gemm_hls-master/build/CMakeFiles/link_hardware.dir/DependInfo.cmake --color=
Dependee "/home/cvg/YJ/gemm_hls-master/build/CMakeFiles/link_hardware.dir/DependInfo.cmake" is newer than depender "/home/cvg/YJ/gemm_hls-master/build/CMakeFiles/link_hardware.dir/depend.internal".
Dependee "/home/cvg/YJ/gemm_hls-master/build/CMakeFiles/CMakeDirectoryInformation.cmake" is newer than depender "/home/cvg/YJ/gemm_hls-master/build/CMakeFiles/link_hardware.dir/depend.internal".
Scanning dependencies of target link_hardware
make[3]: 离开目录“/home/cvg/YJ/gemm_hls-master/build”
make -f CMakeFiles/link_hardware.dir/build.make CMakeFiles/link_hardware.dir/build
make[3]: 进入目录“/home/cvg/YJ/gemm_hls-master/build”
XILINX_PATH=/home/cvg/YJ/gemm_hls-master/build /media/cvg/DATA/ProgramFile/SDx/2018.2/bin/xocc -l -t hw -s -I/home/cvg/YJ/gemm_hls-master/include -I/home/cvg/YJ/gemm_hls-master/hlslib/include -I/home/cvg/YJ/gemm_hls-master/build --kernel MatrixMultiplicationKernel --platform zcu102 --xp prop:kernel.MatrixMultiplicationKernel.kernel_flags=" -std=c++11 -O3 -DMM_SYNTHESIS -DHLSLIB_SYNTHESIS" -O3 --kernel_frequency 250 MatrixMultiplication_hw.xo -o MatrixMultiplication_hw.xclbin

****** xocc v2018.2 (64-bit)
**** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

INFO: [XOCC 60-629] Linking for hardware target
Running SDx Rule Check Server on port:33665
INFO: [XOCC 60-895] Target platform: /media/cvg/DATA/ProgramFile/SDx/2018.2/platforms/zcu102/zcu102.xpfm
INFO: [XOCC 60-423] Target device: zcu102
WARNING: [XOCC 60-887] No System Configuration (--sys_config) option was specified for XOCC Link. A system boot image will not be generated. The current Platform has the following System Configurations: 'a53_linux', 'a53_standalone', 'ocl', 'r5_standalone'
INFO: [XOCC 60-825] xocc command line options for sdx_link are --xo MatrixMultiplication_hw.xo -k MatrixMultiplicationKernel -keep
using /media/cvg/DATA/ProgramFile/SDx/2018.2/platforms/zcu102/zcu102.xpfm
extracting xo v3 file /home/cvg/YJ/gemm_hls-master/build/MatrixMultiplication_hw.xo
Creating IP database /home/cvg/YJ/gemm_hls-master/build/_x/link/sys_link/_sds/.cdb/xd_ip_db.xml
processing accelerators: /home/cvg/YJ/gemm_hls-master/build/_x/link/sys_link/iprepo/xilinx_com_hls_MatrixMultiplicationKernel_1_0
ip_dir: /home/cvg/YJ/gemm_hls-master/build/_x/link/sys_link/iprepo/xilinx_com_hls_MatrixMultiplicationKernel_1_0
/media/cvg/DATA/ProgramFile/SDx/2018.2/bin/xsltproc --stringparam xpath "spirit:component/spirit:name/text()" /media/cvg/DATA/ProgramFile/SDx/2018.2/scripts/xdcc/xpathValueOf.xsl /home/cvg/YJ/gemm_hls-master/build/_x/link/sys_link/iprepo/xilinx_com_hls_MatrixMultiplicationKernel_1_0/component.xml
ip_name: MatrixMultiplicationKernel
Creating apsys_0.xml

Creating dr.bd.tcl
/media/cvg/DATA/ProgramFile/SDx/2018.2/bin/cf2xd: 4: /media/cvg/DATA/ProgramFile/SDx/2018.2/bin/cf2xd: [[: not found
/media/cvg/DATA/ProgramFile/SDx/2018.2/bin/cf2xd: 4: /media/cvg/DATA/ProgramFile/SDx/2018.2/bin/cf2xd: [[: not found
INFO: [CF2XD 83-2203] Adding accelerator adapters...
INFO: [CF2XD 83-2200] Adding axi_interconnects...
INFO: [CF2XD 83-2201] Adding axi_stream_router for scatter-gather DMAs...
INFO: [CF2XD 83-2202] Adding axi_dwidth_converters...
INFO: [CF2XD 83-2208] Adding bus connections for logical connections...
INFO: [CF2XD 83-2205] Adding clock connections...
INFO: [CF2XD 83-2206] Adding reset connections...
/media/cvg/DATA/ProgramFile/SDx/2018.2/bin/cf_xsd: 4: /media/cvg/DATA/ProgramFile/SDx/2018.2/bin/cf_xsd: [[: not found
/media/cvg/DATA/ProgramFile/SDx/2018.2/bin/cf_xsd: 4: /media/cvg/DATA/ProgramFile/SDx/2018.2/bin/cf_xsd: [[: not found
INFO: [XOCC 60-812] xocc command line options for vpl are -t hw -f zcu102 --kernel_frequency 250 --xp param:compiler.enablePerformanceTrace=1 --xp misc:report=type report_timing_summary name impl_report_timing_summary_route_design_summary steps {route_design} runs {impl_1} options {-max_paths 10} --xp prop:kernel.MatrixMultiplicationKernel.kernel_flags= -std=c++11 -O3 -DMM_SYNTHESIS -DHLSLIB_SYNTHESIS --xp param:compiler.lockFlowCritSlackThreshold=0 --xp vivado_prop:run.impl_1.STEPS.POST_ROUTE_PHYS_OPT_DESIGN.IS_ENABLED=true --xp vivado_prop:run.impl_1.STEPS.PHYS_OPT_DESIGN.IS_ENABLED=true --xp vivado_prop:run.KERNEL.{STEPS.SYNTH_DESIGN.ARGS.MORE OPTIONS}={-directive sdx_optimization_effort_high} --xp param:compiler.enableRunInBitstreamGeneration=1 -s

****** vpl v2018.2 (64-bit)
**** SW Build 2258646 on Thu Jun 14 20:02:38 MDT 2018
** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

Attempting to get a license: ap_opencl
WARNING: [VPL 17-301] Failed to get a license for 'ap_opencl'. Explanation: The license feature ap_opencl could not be found.
Resolution: Check the status of your licenses in the Vivado License Manager. For debug help search Xilinx Support for "Licensing FAQ".
Attempting to get a license: ap_sdsoc
Feature available: ap_sdsoc
INFO: [VPL 60-839] Read in kernel information from file '/home/cvg/YJ/gemm_hls-master/build/_x/link/int/kernel_info.dat'.
INFO: [VPL 60-423] Target device: zcu102
INFO: [VPL 60-1032] Extracting DSA to /home/cvg/YJ/gemm_hls-master/build/_x/link/vivado/.local/dsa
INFO: [VPL 60-251] Hardware accelerator integration...
Creating Vivado project and starting FPGA synthesis.
[10:36:26] Block-level synthesis in progress, 0 of 12 jobs complete, 6 jobs running.
[10:37:26] Block-level synthesis in progress, 5 of 12 jobs complete, 5 jobs running.
[10:38:26] Block-level synthesis in progress, 8 of 12 jobs complete, 2 jobs running.
[10:39:26] Block-level synthesis in progress, 11 of 12 jobs complete, 1 job running.
[10:40:26] Block-level synthesis in progress, 11 of 12 jobs complete, 1 job running.
[10:41:26] Block-level synthesis in progress, 11 of 12 jobs complete, 1 job running.
[10:42:26] Block-level synthesis in progress, 11 of 12 jobs complete, 1 job running.
[10:43:26] Block-level synthesis in progress, 11 of 12 jobs complete, 1 job running.
[10:44:26] Block-level synthesis in progress, 11 of 12 jobs complete, 1 job running.
[10:45:26] Block-level synthesis in progress, 11 of 12 jobs complete, 1 job running.
[10:46:26] Top-level synthesis in progress.

===>The following messages were generated while processing /home/cvg/YJ/gemm_hls-master/build/x/link/vivado/prj/prj.runs/impl_1 :
ERROR: [VPL-4] ERROR: [Common 17-55] 'get_property' expects at least one object.
Resolution: If [get] was used to populate the object, check to make sure this command returns at least one valid object.
ERROR: [VPL 60-704] Integration error, problem implementing dynamic region, Design Initialization ERROR
ERROR: [VPL 60-806] Failed to finish platform linker
ERROR: [XOCC 60-398] vpl failed
ERROR: [XOCC 60-626] Kernel link failed to complete
ERROR: [XOCC 60-703] Failed to finish linking
CMakeFiles/link_hardware.dir/build.make:57: recipe for target 'CMakeFiles/link_hardware' failed
make[3]: *** [CMakeFiles/link_hardware] Error 1
make[3]: 离开目录“/home/cvg/YJ/gemm_hls-master/build”
CMakeFiles/Makefile2:242: recipe for target 'CMakeFiles/link_hardware.dir/all' failed
make[2]: *** [CMakeFiles/link_hardware.dir/all] Error 2
make[2]: 离开目录“/home/cvg/YJ/gemm_hls-master/build”
CMakeFiles/Makefile2:249: recipe for target 'CMakeFiles/link_hardware.dir/rule' failed
make[1]: *** [CMakeFiles/link_hardware.dir/rule] Error 2
make[1]: 离开目录“/home/cvg/YJ/gemm_hls-master/build”
Makefile:194: recipe for target 'link_hardware' failed
make: *** [link_hardware] Error 2

from gemm_hls.

Sorry, I don't have experience compiling for SoC devices.

WARNING: [XOCC 60-887] No System Configuration (--sys_config) option was specified for XOCC Link. A system boot image will not be generated. The current Platform has the following System Configurations: 'a53_linux', 'a53_standalone', 'ocl', 'r5_standalone'

Could this be an issue? Have you tried building other OpenCL kernels for your platform? Could you check what flags are set for those builds?

from gemm_hls.

Closing due to inactivity. Feel free to reopen with new information.

from gemm_hls.