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Sergio Paiagua's Projects

covered icon covered

Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format.

streaming-over-pcie icon streaming-over-pcie

A C API built on top of the MPRACE PCI Express driver framework to control the host-side operation of a FPGA-based streaming platform. Developed during my Master Thesis at INESC ID from February to August 2013

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