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2018_cei_intern

2018_cei_intern-1

benchmarks

booksim2

BookSim 2.0

cuda-samples

Samples for CUDA Developers which demonstrates features in CUDA Toolkit

darts

Differentiable architecture search for convolutional and recurrent networks

detectron

FAIR's research platform for object detection research, implementing popular algorithms like Mask R-CNN and RetinaNet.

electron-ssr

Shadowsocksr client using electron

experiments

Experiments for the SMAUG project

faster-rcnn.pytorch

A faster pytorch implementation of faster r-cnn

faster_rcnn.pytorch_tx2

gem5

The official repository for the gem5 computer-system architecture simulator.

git-practice

hrdwr-arch-4-ml

light_head_rcnn

Light-Head R-CNN

lightnet

A light-weight neural network frontend framework for different software/hardware backends.

merge_test

multipim

MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator

object_detection_for_vehicle

parallelsort

pim-bench

pimsim

PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.

posit-neuralnet

PositNN - Framework for training and inference with neural nets usings posits

py-faster-rcnn

Faster R-CNN (Python implementation) -- see https://github.com/ShaoqingRen/faster_rcnn for the official MATLAB version

pytorch-faster-rcnn

0.4 updated. Support cpu test and demo.

pytorch-yolov3

Minimal PyTorch implementation of YOLOv3

ramulator

A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf

ramulator-pim

A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combines a widely-used simulator for out-of-order and in-order processors (ZSim) with Ramulator, a DRAM simulator with memory models for DDRx, LPDDRx, GDDRx, WIOx, HBMx, and HMCx. Ramulator is described in the IEEE CAL

recitation3_repo

scale-sim