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KafCoppelia avatar KafCoppelia commented on May 30, 2024

Even I did so

#ftdi_device_desc "Dual RS232"

and used the blink example, error still happened when uploading with sipeed-rv-debugger lite:

Verbose mode can be enabled via `-v, --verbose` option
CONFIGURATION: https://docs.platformio.org/page/boards/gd32v/sipeed-longan-nano.html
PLATFORM: GigaDevice GD32V (1.3.0+sha.698c089) > Sipeed Longan Nano
HARDWARE: GD32VF103CBT6 108MHz, 32KB RAM, 128KB Flash
DEBUG: Current (altera-usb-blaster) External (altera-usb-blaster, gd-link, jlink, rv-link, sipeed-rv-debugger, um232h)
PACKAGES: 
 - framework-gd32vf103-sdk @ 1.0.0 
 - tool-dfuutil @ 1.11.0 
 - tool-gd32vflash @ 0.1.0 
 - tool-openocd-gd32v @ 0.1.1 
 - toolchain-gd32v @ 9.2.0
LDF: Library Dependency Finder -> https://bit.ly/configure-pio-ldf
LDF Modes: Finder ~ chain, Compatibility ~ soft
Found 0 compatible libraries
Scanning dependencies...
No dependencies
Building in release mode
Checking size .pio/build/sipeed-longan-nano/firmware.elf
Advanced Memory Usage is available via "PlatformIO Home > Project Inspect"
RAM:   [=         ]   7.0% (used 2310 bytes from 32768 bytes)
Flash: [=         ]   5.0% (used 6572 bytes from 131072 bytes)
Configuring upload protocol...
AVAILABLE: altera-usb-blaster, gd-link, jlink, rv-link, serial, sipeed-rv-debugger, um232h
CURRENT: upload_protocol = sipeed-rv-debugger
Uploading .pio/build/sipeed-longan-nano/firmware.elf
Open On-Chip Debugger 0.10.0+dev-00911-gcfbca74bd (2019-09-12-09:31)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
Warn : Transport "jtag" was already selected
jtag
adapter speed: 1000 kHz

Info : clock speed 1000 kHz
Info : JTAG tap: riscv.cpu tap/device found: 0x1000563d (mfg: 0x31e (Andes Technology Corporation), part: 0x0005, ver: 0x1)
Warn : JTAG tap: riscv.cpu       UNEXPECTED: 0x1000563d (mfg: 0x31e (Andes Technology Corporation), part: 0x0005, ver: 0x1)
Error: JTAG tap: riscv.cpu  expected 1 of 1: 0x1e200a6d (mfg: 0x536 (Nuclei System Technology Co.,Ltd.), part: 0xe200, ver: 0x1)
Info : JTAG tap: auto0.tap tap/device found: 0x790007a3 (mfg: 0x3d1 (GigaDevice Semiconductor (Beijing)), part: 0x9000, ver: 0x7)
Error: Trying to use configured scan chain anyway...
Warn : AUTO auto0.tap - use "jtag newtap auto0 tap -irlen 5 -expected-id 0x790007a3"
Warn : Bypassing JTAG setup events due to errors
Info : datacount=4 progbufsize=2
Info : Exposing additional CSR 3040
Info : Exposing additional CSR 3041
Info : Exposing additional CSR 3042
Info : Exposing additional CSR 3043
Info : Exposing additional CSR 3044
Info : Exposing additional CSR 3045
Info : Exposing additional CSR 3046
Info : Exposing additional CSR 3047
Info : Exposing additional CSR 3048
Info : Exposing additional CSR 3049
Info : Exposing additional CSR 3050
Info : Exposing additional CSR 3051
Info : Exposing additional CSR 3052
Info : Exposing additional CSR 3053
Info : Exposing additional CSR 3054
Info : Exposing additional CSR 3055
Info : Exposing additional CSR 3056
Info : Exposing additional CSR 3057
Info : Exposing additional CSR 3058
Info : Exposing additional CSR 3059
Info : Exposing additional CSR 3060
Info : Exposing additional CSR 3061
Info : Exposing additional CSR 3062
Info : Exposing additional CSR 3063
Info : Exposing additional CSR 3064
Info : Exposing additional CSR 3065
Info : Exposing additional CSR 3066
Info : Exposing additional CSR 3067
Info : Exposing additional CSR 3068
Info : Exposing additional CSR 3069
Info : Exposing additional CSR 3070
Info : Exposing additional CSR 3071
Info : Examined RISC-V core; found 1 harts
Info :  hart 0: XLEN=32, misa=0x40901105
Info : Listening on port 3333 for gdb connections
Info : device id = 0x19060410
Info : flash_size_in_kb = 0x00000080
Info : flash size = 128kbytes
Info : JTAG tap: riscv.cpu tap/device found: 0x1000563d (mfg: 0x31e (Andes Technology Corporation), part: 0x0005, ver: 0x1)
Warn : JTAG tap: riscv.cpu       UNEXPECTED: 0x1000563d (mfg: 0x31e (Andes Technology Corporation), part: 0x0005, ver: 0x1)
Error: JTAG tap: riscv.cpu  expected 1 of 1: 0x1e200a6d (mfg: 0x536 (Nuclei System Technology Co.,Ltd.), part: 0xe200, ver: 0x1)
Info : JTAG tap: auto0.tap tap/device found: 0x790007a3 (mfg: 0x3d1 (GigaDevice Semiconductor (Beijing)), part: 0x9000, ver: 0x7)
Error: Trying to use configured scan chain anyway...
Warn : Bypassing JTAG setup events due to errors
** Programming Started **
** Programming Finished **
** Verify Started **
** Verified OK **
Info : Hart 0 unexpectedly reset!

*** [upload] Error 1

I noticed Sipeed RV-Debugger Lite is discussing the same problem. And I tried baudrate 128000 which is not right when I built and uploaded by nuclei-sdk(default baudrate 115200 is not right either).

It's been a year but no any improvement has been done. A little disappointing about GD32.

from platform-gd32v.

elfmimi avatar elfmimi commented on May 30, 2024

@KafCoppelia It should be considered as a success, even it says it's an error. This is not specific to RV-Debugger Lite.

FYI:
Upstream openocd has been improved and does better handling of 'unexpected reset' situation. but it seems tool-openocd-gd32v is not catching up.

Some time ago, I have tried to mitigate this issue by writing enormous openocd script.
see:
https://gist.github.com/elfmimi/1deb9c94b0f0900ae8a9df740b62bcd6
or Joba-1's fork might be better.
https://gist.github.com/joba-1/02454d9d028b37b70be4e4bb4b1d0ce2

from platform-gd32v.

KafCoppelia avatar KafCoppelia commented on May 30, 2024

@elfmimi Thanks for your and Joba-1's method. But I don't know how to change the scirpts to fit with rv-debugger lite. Using your script:

# for SiPEED RV-Debugger Lite
# openocd -f interface/ftdi/minimodule.cfg -c "ftdi_device_desc {Sipeed-Debug}" -f gd32vf103.cfg -c "init; reset run; exit"

Then uploaded the blink project:

Configuring upload protocol...
AVAILABLE: altera-usb-blaster, custom, gd-link, jlink, rv-link, serial, sipeed-rv-debugger, um232h
CURRENT: upload_protocol = custom
Uploading .pio/build/sipeed-longan-nano/firmware.bin
Open On-Chip Debugger 0.10.0+dev-00911-gcfbca74bd (2019-09-12-09:31)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
Unexpected command line argument: {Sipeed-Debug} -f gd32vf103.cfg -c init
reset: unknown terminal type run

stuck here. Using Joba-1's upload_flags which is more complicated was wrong either:

Configuring upload protocol...
AVAILABLE: altera-usb-blaster, custom, gd-link, jlink, rv-link, serial, sipeed-rv-debugger, um232h
CURRENT: upload_protocol = custom
Uploading .pio/build/sipeed-longan-nano/firmware.bin
Open On-Chip Debugger 0.10.0+dev-00911-gcfbca74bd (2019-09-12-09:31)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
Info : clock speed 60000 kHz
Info : TAP riscv.cpu does not have IDCODE
Info : JTAG tap: gd32v.tap tap/device found: 0x037d27fd (mfg: 0x3fe (Intelligence Silicon Technology), part: 0x37d2, ver: 0x0)
Warn : JTAG tap: gd32v.tap       UNEXPECTED: 0x037d27fd (mfg: 0x3fe (Intelligence Silicon Technology), part: 0x37d2, ver: 0x0)
Error: JTAG tap: gd32v.tap  expected 1 of 1: 0x790007a3 (mfg: 0x3d1 (GigaDevice Semiconductor (Beijing)), part: 0x9000, ver: 0x7)
Info : JTAG tap: auto0.tap tap/device found: 0x27fd3ffd (mfg: 0x7fe (<unknown>), part: 0x7fd3, ver: 0x2)
Info : JTAG tap: auto1.tap tap/device found: 0x0bfd037d (mfg: 0x1be (cā€™t Magazine), part: 0xbfd0, ver: 0x0)
Info : JTAG tap: auto2.tap tap/device found: 0x297d1efd (mfg: 0x77e (<unknown>), part: 0x97d1, ver: 0x2)
Info : JTAG tap: auto3.tap tap/device found: 0x7ffd007d (mfg: 0x03e (Oracle Corporation), part: 0xffd0, ver: 0x7)
Info : JTAG tap: auto4.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto5.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto6.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto7.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto8.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto9.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto10.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto11.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto12.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto13.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto14.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto15.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto16.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto17.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Info : JTAG tap: auto18.tap tap/device found: 0x7ffd7ffd (mfg: 0x7fe (<unknown>), part: 0xffd7, ver: 0x7)
Error: Trying to use configured scan chain anyway...
Error: riscv.cpu: IR capture error; saw 0x1a not 0x01
Warn : Bypassing JTAG setup events due to errors
Error: Unsupported DTM version: 10
Info : Listening on port 3333 for gdb connections
Error: Target not examined yet

Error: Unsupported DTM version: 10
*** [upload] Error 1

My rv-debugger lite using lsusb:

Bus 003 Device 006: ID 0403:6010 Future Technology Devices International, Ltd FT2232C/D/H Dual UART/FIFO IC

from platform-gd32v.

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