[Discussion] `Read` and `Ignore` traits for blocking SPI operations about embedded-hal HOT 2 CLOSED

If the chip select component was split out / explicit this would also allow the combination of write and read operations in a single transaction (ie. assert chip select, write command + address, read values, de-assert chip select), which I think is an elegant approach to resolving some difficulty allocating statically sized arrays for operations with two components (setup+write, setup+read).

from embedded-hal.

This was discussed in #178 (comment) (note that this was closed in favour of #191 with only the SPI component), with the conclusion that Ignore is equivalent to Write and Read is equivalent to Transfer with a zeroed array which is preferable as it matches the physical implementation on the device.

Unless there is something else outstanding I believe that resolves this issue?

from embedded-hal.