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Qingcai Jiang's Projects

bhive icon bhive

Reimplementation of the BHive profiler. The original can be found here: https://github.com/ithemal/bhive.

cod-lab icon cod-lab

组成原理课程实验以及最后大作业

compiler icon compiler

大三上编译原理课程实验-PL/0编译器的设计与扩展

damov icon damov

DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is intended to study new architectures, such as near-data processing. Described by Oliveira et al. (preliminary version at https://arxiv.org/pdf/2105.03725.pdf)

enhanced-bhive icon enhanced-bhive

This repository is an improved version of Bhive (https://github.com/ithemal/bhive). The original Bhive version utilized system calls to read PMU counters and generate results, resulting in approximately 300 cycles of BIAS. In this version, we utilized REIGSTER MOVEMENT to perform the same operations, which can effectively remove the BIAS.

gem5 icon gem5

gem5 dev version for ramulator

graphbig icon graphbig

A Comprehensive Benchmark Suite for Graph Computing for validating VIRTUOSO (https://github.com/CMU-SAFARI/Virtuoso)

hscc icon hscc

HSCC is implemented with zsim-nvmain hybrid simulator, it has achieved the following functions: (1) Memory management simulations (such as MemoryNode, Zone, Buddy Allocator etc.); (2) TLB, page table and reversed page table simulations; (3) Implementation of SHMA, a hierarchical hybrid DRAM/NVM memory system that brought DRAM caching issues into so

ibench icon ibench

Measure instruction latency and throughput

llvm-project icon llvm-project

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.

mcpat icon mcpat

An integrated power, area, and timing modeling framework for multicore and manycore architectures

mp3_player icon mp3_player

基于Spartan-3E 开发板与一个无源蜂鸣器的mp3播放器 可播放科大校歌

osaca icon osaca

Open Source Architecture Code Analyzer

ramulator-pim icon ramulator-pim

A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combines a widely-used simulator for out-of-order and in-order processors (ZSim) with Ramulator, a DRAM simulator with memory models for DDRx, LPDDRx, GDDRx, WIOx, HBMx, and HMCx. Ramulator is described in the IEEE CAL

rawhash icon rawhash

RawHash is the first mechanism that can accurately and efficiently map raw nanopore signals to large reference genomes (e.g., a human reference genome) in real-time without using powerful computational resources (e.g., GPUs). Described by Firtina et al. (published at https://academic.oup.com/bioinformatics/article/39/Supplement_1/i297/7210440)

virtuoso icon virtuoso

Virtuoso is a new simulator that focuses on modelling various memory management and virtual memory aspects.

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