psumesh Goto Github PK

aes

Advanced encryption standard implementation in verilog.

amiq_blog

Code snippets from articles published on www.amiq.com/consulting/blog

analog-design-of-1.9-ghz-pll-system

This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, with a comparison between using an LC VCO and using a Ring VCO.

apbi2c_cocotb_example

An example Python-based MDV testbench for apbi2c core

arm-cortex-m-bare-metal-assembler-examples

How the low level init in ARM Cortex processors work?

avr_based_risc

A RISC Processor based on AVR instruction set

axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

baremetal-arm

An ebook about bare-metal programming for ARM

basejump_stl

BaseJump STL: A Standard Template Library for SystemVerilog

basil

A data acquisition framework in Python and Verilog.

c

Collection of various algorithms in mathematics, machine learning, computer science, physics, etc implemented in C for educational purposes.

cfree_es

Code for "Creating Fast, Responsive and Energy-efficient Embedded Systems using the Renesas RL78 Microcontroller"

chisel3

Chisel 3: A Modern Hardware Design Language

chiselverify

A dynamic verification library for Chisel.

chisverilogutils

Quick and Dirty python scripts that modify verilog modules generated by Chisel

ci_cd_jenkins

cmsis_5

CMSIS Version 5 Development Repository

cocotb

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

cocotb-bus

Pre-packaged testbenching tools and reusable bus interfaces for cocotb

cocotb-coverage

Functional Coverage and Constrained Randomization Extensions for Cocotb

cocotb-test

Unit testing for cocotb

cocotb-testrunner

Run tests with cocotb

cocotbext-eth

Ethernet interface modules for Cocotb

cocotbext-pcie

PCI express simulation framework for Cocotb

cocotbext-ral

A port of the uvm-python RAL to use BusDrivers

combinator-uvm

UVM Testbench For SystemVerilog Combinator Implementation

cores-swerv

SweRV EH1 core

corescore

CoreScore

cosim_bfm_library

HW-SW Co-Simulation Library for AMBA AXI BFM using DPI/VPI

courses

Course materials for the Data Science Specialization: https://www.coursera.org/specialization/jhudatascience/1