[LLVMCPU] Bad codegen for 1D layernorm on riscv64 about iree HOT 2 OPEN

Hi @dcaballe, do you interested on taking a look at it?

from iree.

(Sorry, catching up after break)

I think the problem could be related to the fact that we are reducing the outer dimension here:

  %7 = vector.contract {indexing_maps = [#map, #map, #map1], iterator_types = ["reduction", "parallel"], kind = #vector.kind<add  , %6, %arg1 : vector<1x32xf32>, vector<1x32xf32> into vector<32xf32>

and the outer-product strategy expects a very specific "matmul-like" contraction. If the contraction doesn't align with that it will convert it to that "matmul-like" form by changing the layout of the inputs and we may end up vectorizing a dimension that we shouldn't (see scalar code).

I would need to think a bit more about this but perhaps we should use a different strategy only when the contraction op is not suitable to be represented with an outer product.

from iree.