Comments (9)
Yes, the heap memory is carved out from that range.
from optee_os.
TZDRAM_SIZE
covers both TEE_RAM and TA_RAM (in the most common case where CFG_WITH_PAGER=n
).
CFG_CORE_HEAP_SIZE
indeed that relates to core heap (malloc()
and friends) in TEE_RAM only.
TA RAM is set by function core_mmu_get_ta_ram()
: it is either hard coded or computed as the unused area of TZDRAM.
- hard coded: defined by
TA_RAM_START
/TA_RAM_SIZE
in platforms' platform_config.h (few platforms) - computed from
TZDRAM_SIZE - TEE_RAM_VA_SIZE
(minusTEE_SDP_TEST_MEM_SIZE
, likely 0 on most platforms) whereTEE_RAM_VA_SIZE
is set fromCFG_TEE_RAM_VA_SIZE
if defined or fallback toCORE_MMU_PGDIR_SIZE
. In this case, the biggerCFG_CORE_HEAP_SIZE
is, the lower TA_RAM size is. Increasing by few dozen of kBytes should be straight forward. Increasing by many MBytes may need to increase alsoTZDRAM_SIZE
.
from optee_os.
You told me that CFG_CORE_HEAP_SIZE is only involved in TEE_RAM, but I don't understand the sentence below.
"the bigger CFG_CORE_HEAP_SIZE is, the lower TA_RAM size is."
Is this only if CFG_TEE_RAM_VA_SIZE is set?
from optee_os.
My mistake. Indeed TEE_RAM size is set from CFG_TEE_RAM_VA_SIZE
(I agree the name is confusing).
Changing CFG_CORE_HEAP_SIZE
will not modify CFG_TEE_RAM_VA_SIZE
, hence not modify TA_RAM size.
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@etienne-lms
Thank you for the correction.
If CFG_WITH_PAGER=n and CFG_TEE_RAM_VA_SIZE is not set, I would like to know how TEE_RAM_VA_SIZE is set.
from optee_os.
TEE_RAM_VA_SIZE
defaults to CORE_MMU_PGDIR_SIZE
that is 2MBytes on Armv8-A.
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@etienne-lms
To increase the maximum RSA operation, we are going to modify CORE_HEAP_SIZE from 64kB to about 144kB.
Will there be any major problems if I continue to use the default TEE_RAM of 2MB?
from optee_os.
I don't think you will face issues.
from optee_os.
@etienne-lms
Thank you very much for your help.
from optee_os.
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