numato-vijaya Goto Github PK

analog-to-digital

Verilog for using an ADC to sample analog video and output to a digital display (VGA, HDMI, etc.)

cocotb

Coroutine Co-simulation Test Bench

fpga

Student-project

fpga-design-flow-using-vivado

This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite

hdmi_leds_seg7

FPGA project which implements "virtual LEDs" and "virtual 7-segment indicator", displaying them on HDMI output of Marsohod3 board.

img_cap_hdmi

ixo-usb-jtag

usb-jtag - Altera USB Blaster Emulation with a FX2

linux-xlnx

The official Linux kernel from Xilinx

meta-xilinx

Xilinx device and board support for Yocto/OE-core.

minispartan6-plus

nios2mmu

A Nios II design with MMU for socfpga-linux 4.11. Tested with Altera DE2-115.

openocd

Fork of OpenOCD

ov_ftdi

FT2232H-based USB sniffer

samplecode

This repository contains sample code for different Numato Lab products

simple_custom_peripheral_bare_metal

A simple PlanAhead, XPS, and SDK project that has a custom peripheral and code to talk to it.

uart_core_lib

Driver - Library for C applications using Altera's UART Core through Avalon Bus on Cyclone V.

xvcd

Xilinx Virtual Cable Daemon

zynq-fir-filter-example

FIR Filter C code example for GNU Radio's 2013 GSoC Zynq project