Can the SPI bus be made to run at 100 MHz? about a314 HOT 1 CLOSED

I did a test with a very simple Verilog code, just shifting bits out out the FPGA and onto the MISO SPI-pin to the RPi, and printed out the received data as seen by the RPi. It works fine at 66 MHz, but at 100 MHz the bits are delayed by one bit. I think this concludes this experiment, with the result that we cannot do 100 MHz SPI.

It is unclear to me what kind of PCB modifications would be needed to make it work; it is possible that there are "problems" with the RPi PCB as well, or the 40-pin connector between the PCBs, that makes 100 MHz infeasible.

from a314.