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ao486

The ao486 is an x86 compatible Verilog core implementing all features of a 486 SX.

ao486_mister

ao486 port for MiSTer

apb2i2c

A i2C APB CORE MASTER AND SLAVE ASIC IP

avalon-mm-master-template

用于avalon-mm-master总线接口的内存读写控制器

avalon_mm_master_templates

avalon memory mapped master templates, based on a old post, refined and ported to QSYS

blaster

Altera USB Blaster porting to Artery AT32F425 and WCH CH32V203.

ch559sdccusbhost

USB host to Arduino Interface with the Cheap CH559 uC

ch55x-usb-blaster

USB-Blaster instance on CH55x MCU.

darknet

YOLOv4 / Scaled-YOLOv4 / YOLO - Neural Networks for Object Detection (Windows and Linux version of Darknet )

deca_graphics

flearadio

Digital FM Radio Receiver for FPGA

fm_radio

Simple mono FM Radio.

fpga-vision

Learn about image processing with an FPGA. Video lectures explain algorithm and implementation of lane detection for automotive driving. Real hardware is available as a remote lab.

fpga_nes

FPGA-based Nintendo Entertainment System Emulator

fpga_super_mario_bros

FPGA SOC Mario NES in SystemVerilog. Built on a DE-10 Lite FPGA, synthesized in Quartus Prime 18.1

fpganes

NES in Verilog

gamegirl

fpga based nes box

guilite

✔️The smallest header-only GUI library(4 KLOC) for all platforms

ice40

Lattice iCE40 FPGA experiments - Work in progress

ili9341_fpga

Verilog Driver for the ILI9341 TFT Module

ks_diy_link

个人DIY LINK V9 高速SWD 12000kHz

lvgl

Embedded graphics library to create beautiful UIs for any MCU, MPU and display type. It's boosted by a professional yet affordable drag and drop UI editor, called SquareLine Studio.

nextpnr

nextpnr portable FPGA place and route tool

nios2-linux

The uClinux 2.6 adapted for nios2 with Altera DE2-115

nuedc_topic

收集并整理了全国大学生电子设计竞赛从1994年至2021年的历年赛题，如有遗漏欢迎补充！

pitubeclient

Raspberry Pi Tube Client

playing-card-detection

pocketsphinx

Android PocketSphinx离线语音识别。博客：https://blog.csdn.net/Crystal_xing/article/details/84957466

pocketsphinx-1

PocketSphinx is a lightweight speech recognition engine, specifically tuned for handheld and mobile devices, though it works equally well on the desktop

r8051

8051 soft CPU core. 700-lines statements for 111 instructions . Fully synthesizable Verilog-2001 core.