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kyouma48596's Projects

basic-simd-processor-verilog-tutorial icon basic-simd-processor-verilog-tutorial

Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in this ALU. The ALU operation will take two clocks. The first clock cycle will be used to load values into the registers. The second will be for performing the operations. 6-bit opcodes are used to select the functions. The instruction code, including the opcode, will be 18-bit.

ca-lab icon ca-lab

This repo contains a collection of processors that I designed and implemented as part of the Computer Architecture course at BITS Pilani

combinatorc icon combinatorc

A C-style programming language for expressing practical Factorio circuits that compiles into Factorio combinator blueprints

ps2-keyboard-interface icon ps2-keyboard-interface

This Vivado project allows the Nexys A7 board to interface with a USB keyboard via PS/2 interface and perform various tasks.

uvm-based-noc-verification icon uvm-based-noc-verification

This repository contains a UVM based testbench written by me in order to carry out the block level verification of an NoC Mesh, as part of a project.

uvm_counter_verif icon uvm_counter_verif

This repository documents my attempt at building a UVM-based layered testbench to verify a simple digital counter.

verilog-stuff icon verilog-stuff

A repo where i keep track of my progress trying to learn the verilog HDL.

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