Comments (10)
Directly load the image into a 16kB SRAM, which is all that's needed to run the full 6502 suite of functional tests. In other words, use the capability of the FPGA simulator and/or FPGA power-on configuration to initialize the Block RAMs with the functional test code and directly vector to the tests. on reset. There's no need to copy from ROM to RAM. This approach is readily supported by Verilog and ISim.
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I'm assuming there could be a situation where a user has a ROM which they can program up, and a RAM, but no ready way to load RAM. Of course they could do a block move, but that would involve some relocation, unless they are able to build for one target address and load at another. Simplest (for the user) would be if the code were ROM-friendly.
I agree that in this specific case they could probably modify their emulator or HDL design to run the code as-is.
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In Verilog, the initial statement may used to invoke a system process that can perform the required initialization operations without additional coding. In the simulation, the following instantiation sets up the RAM model to load the memory initialization file for the 6502 functional test:
M65C02_RAM #(
.pAddrSize(pRAM_AddrWidth),
.pDataSize(8),
.pFileName("Src/65C02_FT.txt")
) RAM (
In the RAM model, the specified memory initialization file is loaded by the initial statement and the $readmemh() system function:
reg [(pDataSize - 1):0] RAM [pRAM_Max:0];
initial
$readmemh(pFileName, RAM, 0, pRAM_Max);
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I will implement a new configuration variable "disable_selfmod" with a big warning about the untested instructions when using it.
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Sounds great, thanks!
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Leave it to a neo-luddite to comment on a thread not his own. My apologies to BigEd and Klaus2M5.
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Not a problem for me! If you have a stackoverflow account you might want to join in over there - I don't have one. But it might be better to wait until a fix.
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Not a problem at all!
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The config switch "disable_selfmod" was added.
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The self modifying immediate opcodes are moved to data RAM and will be tested even if the code itself is executed in ROM. The remaining self modifying branch range test still needs to be disabled, but is supplemented with an early relative addressing test.
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Related Issues (15)
- missing bin files HOT 3
- as65.exe-generated .bin files need 10byte padding at the beginning HOT 1
- Issue with the functional test (TSX, LDA $102,X) HOT 4
- Including a .bin file from your repo HOT 1
- Trap in 65c02 functional test code HOT 2
- Version of binary examples differs from latest source release HOT 1
- Problem with checking RMW absolute indexed page crossing
- Add option to turn off decimal mode specific tests HOT 3
- Incorrect branch instruction in report.i65 for converting hex characters HOT 4
- 65C02 TRB fails HOT 1
- BRK instruction not tested with interrupts disabled HOT 1
- "Bootable ROM" extension HOT 1
- Possible test escape: ROR with carry clear can set zero flag HOT 3
- AS65 Assembler is difficult to find HOT 4
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