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Must-have verilog systemverilog modules
DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow video controller with alpha-blended layers. Docs & TBs included.
https://caravel-user-project.readthedocs.io
Various HDL (Verilog) IP Cores
A DDR3 memory controller in Verilog for various FPGAs
Open source FPGA-based NIC and platform for in-network compute
RTL Verilog library for various DSP modules
数字IC相关资料
An FPGA-based lightweight CAN bus controller. 基于FPGA的轻量级CAN总线控制器。
An open source library for image processing on FPGA.
Verilog implementation of a ultrasonic radar
An FPGA-based USB full-speed device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB full-speed device端控制器,可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备,只需要3个FPGA普通IO,而不需要额外的接口芯片。
720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)
帮助大家进行FPGA的入门,分享FPGA相关的优秀文章,优秀项目
SDRAM controller optimized to a memory bandwidth of 316MB/s
A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
The High-Frequency Trading FPGA System is an ultra-low latency platform for electronic trading on FPGAs. It features a TCP/IP stack, order matching engine, custom IP core, and risk management module for accelerated and reliable trade execution.
Electronic control of microscope elements (camera/laser triggering, TTL, PWM, servos, analog i/o) based on affordable FPGAs, integrated with Micro-Manager, Java, Python and LabView.
AXI Interface Nand Flash Controller (Sync mode)
Open FPGA Modules
A Real Time Clock core for FPGA's
Verilog SDRAM memory controller
Verilog RTL Design
MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX with Hard MIPI PHY. Gbps UVC Video Stream Over USB 3.0 with Cypress FX3, Currently WIP
Source and Documentation files for USB C Industrial Camera Project, This repo contains PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.
Verilog AXI components for FPGA implementation
Verilog AXI stream components for FPGA implementation
Verilog Ethernet components for FPGA implementation
Verilog PCI express components
A declarative, efficient, and flexible JavaScript library for building user interfaces.
🖖 Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.
TypeScript is a superset of JavaScript that compiles to clean JavaScript output.
An Open Source Machine Learning Framework for Everyone
The Web framework for perfectionists with deadlines.
A PHP framework for web artisans
Bring data to life with SVG, Canvas and HTML. 📊📈🎉
JavaScript (JS) is a lightweight interpreted programming language with first-class functions.
Some thing interesting about web. New door for the world.
A server is a program made to process requests and deliver data to clients.
Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.
Some thing interesting about visualization, use data art
Some thing interesting about game, make everyone happy.
We are working to build community through open source technology. NB: members must have two-factor auth.
Open source projects and samples from Microsoft.
Google ❤️ Open Source for everyone.
Alibaba Open Source for everyone
Data-Driven Documents codes.
China tencent open source team.