Comments (2)
Thank you @JHertz5 .
from vhdl-style-guide.
Hi @MJoergen. I think I know why your configuration file isn't working. The properties are not called indent_style
and indent_size
, they are called indentStyle
and indentSize
. You will see that if you run vsg -rc <rule_name>
, the output should contain
...
"indentStyle": "spaces",
"indentSize": 2,
...
If you try the following config, you should have better results:
rule:
global:
indentStyle: 'spaces'
indentSize: 3
This mistake is easy to make, given that all, or at least the vast majority, of the properties of rules are snake_case rather than camelCase. Perhaps it is worth raising an issue to correct this inconsistency.
from vhdl-style-guide.
Related Issues (20)
- `indentStyle` and `indentSize` fields of rule config are camelCase, which is inconsistent with other rule config fields. HOT 10
- Junit Report says Failure when successfull HOT 5
- VSG crashes when the `package` keyword is the first word in the file HOT 1
- The solution message for `type_008` is misleading HOT 2
- Add rules for function and parameter to have the closing parenthesis on its own line HOT 9
- Typo - "superceeced" HOT 2
- Default configuration of rule `procedure_call_003` does not match that described in the documentation. HOT 3
- Support placement of block closing statement relative to openeing statement vertical alignment HOT 3
- Add rules to enforce prefixes and suffixes on for generate/loop parameters HOT 3
- The list of disabled rules in "Configuring Disabled Rules" is incomplete HOT 2
- Reducing duplication of rule identifiers in the codebase HOT 5
- Add documentation for contributers
- Running the unit tests leaves behind a file in the root of the repository HOT 2
- Exception on valid VHDL " 'close_parenthesis' object has no attribute 'iId' " when using --all_phases HOT 2
- Hang on malformed array range followed by unclosed port HOT 5
- port_026 missing closing parenthesis in split ports HOT 3
- Code block is not showing on Configuring Multiline Indent Rules page HOT 2
- procedure_call_003 alignment glitch with positional parameters HOT 3
- interface_list reprocesses the same interface_element multiple times HOT 2
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from vhdl-style-guide.