jblanusa Goto Github PK
Name: Jovan Blanuša
Type: User
Jovan Blanuša's Projects
aes_acceleration
Aes accelerator for FPGA4U
fpga_layout
Full custom FPGA design in 180nm technology using Cadence Virtuoso
mockturtle
C++ logic network library
os_project
Project for Operating Systems 1 course. A kernel with threads, semaphores, events and system mode.
ponggame_msp430
Pong game on msp430 microcontroller displayed on Mikroelektronika's OLED W click board
rsa_acceleration
Bachelor's thesis project. RSA acceleration HW/SW design for DE1-SOC board
sqlserver.polyservice
SQL Server integration with Azure
vgacamera_es_project
Final project for Embedded Systems Course. Design of an embedded system with VGA and Camera interface.
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