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View Code? Open in Web Editor NEWAttempt to simulate a CPU on gate level.
Attempt to simulate a CPU on gate level.
Make a NOR gate capable of taking more than two inputs.
Create RAM and ways to interact with it.
Make the Instruction Address Generator with the Programme Counter.
Make a class RegisterFile (unit that contains the registers).
Constructors for the logic gates and control circuitry (Input and Output) miss the mention of the BitStreams that are required as parameters.
Make a circuit that would work as a decoder. Most preferably make it work generally for any input size.
The exceptions' messages introduce a lot of repeated code. Possible solution would be to have two constructors one with only the object, one with a custom error message.
Make the microprocessor which is a part of the control circuitry.
Change the D latches in registers and the ALU into flip-flops. This might make it possible to execute microinstructions in one clock cycle.
Currently inconsistencies are warnings, they need to be error (eg by making a time out)
Make nand that can take multiple input (more than 2)
Make general clean-up for the code:
Make this function rely on the sizes of the inputs not on the word size as defined in Node.
Very rarely (about 1 in 70000 runs) detecting the overflow does not work.
Make all flip flops have a lines to reset them and enable/disable .
Make tests to test how the ALU and the RF work together and if they work correctly.
Make a class that would implement the run method so that it will not be needed to define run method everytime.
Create a class that would take a list of input BitStreams and a list of output BitStreams and forward the information from the input list to the output list.
Create a Node that would take an input of specific size and then output same inputs but more of them.
Those two classes do practically the same, merge them into one.
Display more important information that currently, something like gdb.
NAND and NOT are missing tests. None of the gates also have the inconsistency/incorrect bit streams tests.
It will be required to have multi input gates.
Make a Register class.
There are multiple checkstyle errors. They need to be fixed.
Create a circuit to do logic operations on source and destination streams
Create a circuit to perform addition and subtraction.
Make new instructions, including branching and conditional branching
Define a run method for a CPU to enable CPU to be a standalone unit. Also put the debug "requestStatus" if wanted.
Create an AND gate that would take multiple inputs (more than 2).
Setting flags still does not work.
Let the processor issue and manage interrupts to allow for basic Input/Output.
Try to make a tool to design and possibly simulate circuits to stop using limited external tools for that.
Define the CPU circuit that has all the components build so far connected with the control unit.
Build a control unit (probably emulated) and make simple, hardcoded operations.
Create a basic Arithmetic and Logic Unit circuit.
Using methods setBitStream in the nodes only changes the bit stream without removing the node from the bit stream's endpoints and adding the node to another bit stream endpoints.
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