Name: Institute for Integrated Circuits, Johannes Kepler University Linz
Type: Organization
Bio: The IIC provides expertise for all main steps in the design and realization of integrated circuits, embedded systems, as well as cyber-physical systems.
Location: Linz, Austria
Blog: https://iic.jku.at/
Institute for Integrated Circuits, Johannes Kepler University Linz 's Projects
A set of rules and recommendations for analog and digital circuit designers.
DA_ETCS - A tool for railway design automation for ETCS Level 3
Sample from Quantum Hamiltonians using decision diagrams
A Docker Container based one CentOS 7 to run commercial EDA applications, that require a legacy OS environment.
Mapping of OPENQASM programs to IBM QX satisfying the architectural constraints
130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design
Delta-sigma audio DAC (16b, 48kHz), intended for tape-out on MPW-5, SKY130 technology.
A fork of Stefan Krause's circdia LaTeX package with modifications for Institute for Integrated Circuits, JKU.
IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.
Reinforcement learning assisted analog layout design flow.
LaTeX Beamer Theme for Johannes Kepler University Linz
TDC based on simple inverter chain
TDC based on simple inverter ring
Temperature sensor from standard cells
Course material for 336.007 (Prof. Pretl) in WS22 at JKU
Course material for 336.004 (Prof. Pretl) in SS24 at JKU
Mapping Quantum Circuits to IBM QX Architectures Using the Minimal Number of SWAP and H Operations
MPW-8 tapeout submission containing mixed-signal circuit blocks in SKY130
An innovative Verilog-A compiler
JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.
Repository containing a collection of quantum circuits
Helpful Cadence Skill Scrips
Documentation for RTL-with-customcells to GDSII
A case study of a continuous-time Delta-Sigma modulator including system-level simulations/design of the CT-DSM, circuit-design of the front-end Gm-cell and a mixed-signal simulation w/ Ngspice.
Implementation of a Sub-Sampling PLL targeting SerDes Applications in SKYWATER PDK 130nm process
PMOS power gate for TinyTapeout