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👋 Hi, I’m Mitu Raj from India.

👔 Founder & CEO at Chipmunk Logic™ - https://chipmunklogic.com

👀 I’m into RTL Design, Embedded Software Development, GUI/CLI Software Development for OS, Scripts, Math, Physics and much more.

🎓 I believe knowledge is all about sharing, and learning is permanent.

📫 Feel free to reach me - [email protected] or [email protected]

Mitu Raj's Projects

apb icon apb

APB master and slave developed in RTL.

debouncer icon debouncer

Debouncer circuit in Verilog to filter glitches/bounces inherent in switches.

fifos icon fifos

Register-based and RAM-based FIFOs designed in Verilog/System Verilog.

lifo-stack icon lifo-stack

Register-based LIFO aka Stack designed in Verilog/System Verilog.

pequeno_riscv icon pequeno_riscv

Pequeno (PQR5) is a 5-stage pipelined in-order RISC-V CPU Core compliant with RV32I ISA.

pqr5asm icon pqr5asm

PQR5ASM is a RISC-V Assembler compliant with RV32I

skid_buffer icon skid_buffer

Skid Buffer and Pipeline Skid Buffer designed in Verilog/System Verilog.

tweak_circuits icon tweak_circuits

Tweak circuits designed in VHDL/Verilog like CDC synchronizers: Pulse synchronizer, Reset synchronizer, Two-flop synchronizer, Edge detectors, Pulse generators, Clock gating etc.

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