Comments (2)
cratelyn
commented on July 28, 2024
Restating some previous discussion below, for posterity:
My instinct here is that end users shouldn't need to trace hyper/tokio events unless there's a bug in Viceroy, and that
RUST_LOGis enough of a knob for that.I think what's likely to be useful for most customers is the option to trace hostcall interactions in a lot more detail. That will need some design to do well, but especially given that wasm is a new platform for most folks, being able to log interactions with the host will probably help a lot.
One consideration there is that just about everyone will be using an SDK, so the actual hostcalls being made are at a lower level of abstraction than the code they are writing. That makes me wonder whether we could provide any kind of trace data from the SDKs (i.e. from within guest code). That could potentially be useful in production as well, though the considerations are very different there...
here are some assorted thoughts on the question of logging...
stadium Log Levels
I'll second the opinion that hyper/tokio events are probably a bit overkill, or a step in a different direction than customers would benefit from.
One notion I'd propose is that rather than increasing verbosity directly corresponding to more logs, for Viceroy this might mean displaying more information about things like runtime limits, expected billing numbers, or other related external resources like Edge Dictionaries.
That said, it could be pleasant to leave some sort of "show me everything" button, so that people reporting bugs in Viceroy could present us a tarball containing especially detailed logs. IMO, this is a related but distinct concern from the question of logging ergonomics for developers.
triangular_ruler SDK Diagnostics
That makes me wonder whether we could provide any kind of trace data from the SDKs (i.e. from within guest code). That could potentially be useful in production as well, though the considerations are very different there...
That's actually a really great point! I do remember that other folks had a similar idea of patching the
fastlycrate to emit more diagnostics, in order to support Fiddle iirc.I suppose one vacuous point I'd ask is whether logging is prone to be affected by different host languages' respective idioms -- i.e. in Rust it's common practice to use
tracingand emit structured spans/events, but I'm less confident OTTOMH whether other host languages would have an idiomatic language like that.ballot_box Log Format
One option that could especially help people integrating Viceroy with other systems (hi @triblondon! hi @kailan!) would be a
--message-format=jsonflag a la rustc, so that Viceroy could be run in a mode wherein all logs were presented in a machine readable format.
from viceroy.
GeeWee
commented on July 28, 2024
I have two comments.
- Currently running
RUST_LOG=debug fastly compute serveon my machine just ends up outputting an endless stream of debug logs of some sort, and the server never starts
An example of this debug output.
Initializing...
Verifying package manifest...
Verifying local rust toolchain...
Initializing...
Building package using rust toolchain...
Creating package archive...
SUCCESS: Built package 'edge-api' (pkg/edge-api.tar.gz)
Initializing...
Running local server...
May 17 08:04:03.228 DEBUG RUST_LOG set to 'debug'
May 17 08:04:03.255 DEBUG timing: Starting Translate WASM function, (during <no pass>)
May 17 08:04:03.255 DEBUG timing: Starting Translate WASM function, (during <no pass>)
May 17 08:04:03.255 DEBUG timing: Starting Translate WASM function, (during <no pass>)
May 17 08:04:03.255 DEBUG timing: Ending Translate WASM function
May 17 08:04:03.255 DEBUG timing: Starting Compilation passes, (during <no pass>)
May 17 08:04:03.255 DEBUG timing: Starting Translate WASM function, (during <no pass>)
May 17 08:04:03.255 DEBUG timing: Starting Translate WASM function, (during <no pass>)
May 17 08:04:03.255 DEBUG timing: Starting Translate WASM function, (during <no pass>)
May 17 08:04:03.255 DEBUG timing: Ending Translate WASM function
May 17 08:04:03.255 DEBUG Compiling (opt level Speed):
function u0:46(i64 vmctx, i64) fast {
gv0 = vmctx
gv1 = load.i64 notrap aligned readonly gv0
gv2 = load.i64 notrap aligned gv1
gv3 = vmctx
sig0 = (i64 vmctx) wasmtime_system_v
sig1 = (i64 vmctx, i64) fast
fn0 = colocated u0:4739 sig1
stack_limit = gv2
block0(v0: i64, v1: i64):
@2836 v2 = global_value.i64 gv3
@2836 v3 = load.i64 notrap aligned v2
v14 -> v3
@2836 v4 = load.i64 notrap aligned v3+8
@2836 v5 = iadd_imm v4, 1
@2836 v6 = iconst.i64 0
@2836 v7 = ifcmp v5, v6
@2836 brif sge v7, block2
@2836 jump block3(v5)
block2:
@2836 store.i64 notrap aligned v5, v3+8
@2836 v8 = global_value.i64 gv3
@2836 v9 = load.i64 notrap aligned readonly v8+0x0001_db38
@2836 v10 = load.i64 notrap aligned readonly v9+152
@2836 call_indirect sig0, v10(v8)
@2836 v11 = load.i64 notrap aligned v3+8
@2836 jump block3(v11)
block3(v12: i64):
@2837 v13 = iadd_imm v12, 1
@2837 store notrap aligned v13, v3+8
@2837 call fn0(v0, v0)
@2837 v15 = load.i64 notrap aligned v14+8
@283a jump block1
block1:
@283a store.i64 notrap aligned v15, v14+8
@283a return
}
May 17 08:04:03.255 DEBUG timing: Starting Compilation passes, (during <no pass>)
May 17 08:04:03.255 DEBUG timing: Starting Control flow graph, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Control flow graph
May 17 08:04:03.255 DEBUG timing: Starting Pre-legalization rewriting, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Pre-legalization rewriting
May 17 08:04:03.255 DEBUG timing: Starting Dominator tree, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Dominator tree
May 17 08:04:03.255 DEBUG timing: Starting Loop analysis, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Loop analysis
May 17 08:04:03.255 DEBUG timing: Starting Loop invariant code motion, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Starting Control flow graph, (during Loop invariant code motion)
May 17 08:04:03.255 DEBUG timing: Ending Control flow graph
May 17 08:04:03.255 DEBUG timing: Starting Dominator tree, (during Loop invariant code motion)
May 17 08:04:03.255 DEBUG timing: Ending Dominator tree
May 17 08:04:03.255 DEBUG timing: Ending Loop invariant code motion
May 17 08:04:03.255 DEBUG timing: Starting Global value numbering, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Global value numbering
May 17 08:04:03.255 DEBUG timing: Starting Dominator tree, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Dominator tree
May 17 08:04:03.255 DEBUG timing: Starting Remove unreachable blocks, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Remove unreachable blocks
May 17 08:04:03.255 DEBUG timing: Starting Dead code elimination, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Dead code elimination
May 17 08:04:03.255 DEBUG timing: Starting Remove constant phi-nodes, (during Compilation passes)
May 17 08:04:03.255 DEBUG do_remove_constant_phis: done, 2 iters. 1 formals, of which 0 const.
May 17 08:04:03.255 DEBUG timing: Ending Remove constant phi-nodes
May 17 08:04:03.255 DEBUG Compiling (opt level Speed):
function u0:3742(i64 vmctx, i64, i32, i32) -> i32 wasmtime_system_v {
gv0 = vmctx
gv1 = load.i64 notrap aligned readonly gv0
gv2 = load.i64 notrap aligned gv1
gv3 = vmctx
gv4 = load.i64 notrap aligned readonly gv3+1076
heap0 = static gv4, min 0, bound 0x0001_0000_0000, offset_guard 0x8000_0000, index_type i32
sig0 = (i64 vmctx) wasmtime_system_v
sig1 = (i64 vmctx, i64, i32, i32, i32, i32) fast
sig2 = (i64 vmctx, i64, i32, i32, i32) -> i32 fast
sig3 = (i64 vmctx, i64, i32) -> i32 fast
sig4 = (i64 vmctx, i64, i32, i32, i32) -> i64 fast
sig5 = (i64 vmctx, i64, i32, i32, i32, i32, i32) -> i32 fast
sig6 = (i64 vmctx, i64, i32) -> i32 fast
sig7 = (i64 vmctx, i64, i32, i32, i32) -> i32 wasmtime_system_v
fn0 = colocated u0:4906 sig1
fn1 = colocated u0:4871 sig2
fn2 = colocated u0:4872 sig3
fn3 = colocated u0:4905 sig4
fn4 = colocated u0:4847 sig5
fn5 = colocated u0:4870 sig6
fn6 = colocated u0:4898 sig7
jt0 = jump_table [block11, block9, block8, block7, block6, block5]
stack_limit = gv2
block0(v0: i64, v1: i64, v2: i32, v3: i32):
v21 -> v2
v36 -> v2
v28 -> v3
@1ebf32 v5 = iconst.i32 0
@1ebf32 v6 = global_value.i64 gv3
@1ebf32 v7 = load.i64 notrap aligned v6
v34 -> v7
@1ebf32 v8 = load.i64 notrap aligned v7+8
@1ebf32 v9 = iadd_imm v8, 1
@1ebf32 v10 = iconst.i64 0
@1ebf32 v11 = ifcmp v9, v10
@1ebf32 brif sge v11, block2
@1ebf32 jump block3(v9)
block2:
@1ebf32 store.i64 notrap aligned v9, v7+8
@1ebf32 v12 = global_value.i64 gv3
@1ebf32 v13 = load.i64 notrap aligned readonly v12+0x0001_db38
@1ebf32 v14 = load.i64 notrap aligned readonly v13+152
@1ebf32 call_indirect sig0, v14(v12)
@1ebf32 v15 = load.i64 notrap aligned v7+8
@1ebf32 jump block3(v15)
block3(v24: i64):
@1ebf34 v16 = global_value.i64 gv3
@1ebf34 v17 = load.i32 notrap aligned v16+1104
@1ebf3a v18 = iconst.i32 16
@1ebf3c v19 = isub v17, v18
v26 -> v19
@1ebf3f v20 = global_value.i64 gv3
@1ebf3f store notrap aligned v19, v20+1104
@1ebf55 v22 = heap_addr.i64 heap0, v2, 1
@1ebf55 v23 = uload8.i32 little v22
@1ebf58 v25 = iadd_imm v24, 8
v31 -> v25
@1ebf58 br_table v23, block11, jt0
block11:
jump block10(v28, v7)
block12:
jump block10(v28, v34)
block10(v27: i32, v33: i64):
@1ebf66 v29 = iconst.i32 0x0050_e268
@1ebf6c v30 = iconst.i32 4
@1ebf6e v32 = iadd_imm.i64 v25, 5
@1ebf6e store notrap aligned v32, v33+8
@1ebf6e call fn0(v0, v0, v19, v27, v29, v30)
@1ebf6e v35 = load.i64 notrap aligned v33+8
@1ebf78 v37 = iconst.i32 4
@1ebf7a v38 = iadd.i32 v2, v37
@1ebf7b v39 = heap_addr.i64 heap0, v26, 1
@1ebf7b store little v38, v39+12
@1ebf82 v40 = iconst.i32 12
@1ebf84 v41 = iadd.i32 v26, v40
@1ebf85 v42 = iconst.i32 0x0050_e26c
@1ebf8b v43 = iadd_imm v35, 11
@1ebf8b store notrap aligned v43, v33+8
@1ebf8b v44 = call fn1(v0, v0, v26, v41, v42)
@1ebf8b v45 = load.i64 notrap aligned v33+8
@1ebf94 v46 = iadd_imm v45, 2
@1ebf94 store notrap aligned v46, v33+8
@1ebf94 v47 = call fn2(v0, v0, v26)
@1ebf94 v48 = load.i64 notrap aligned v33+8
@1ebf9c v49 = iadd_imm v48, 2
@1ebf9c jump block4(v26, v47, v49, v33)
block9:
@1ebfa3 v50 = iconst.i32 0x0050_e24c
@1ebfa9 v51 = iconst.i32 12
@1ebfab v52 = iadd_imm.i64 v25, 5
@1ebfab store notrap aligned v52, v34+8
@1ebfab call fn0(v0, v0, v19, v28, v50, v51)
@1ebfab v53 = load.i64 notrap aligned v34+8
@1ebfb5 v54 = iconst.i32 4
@1ebfb7 v55 = iadd.i32 v21, v54
@1ebfb8 v56 = heap_addr.i64 heap0, v19, 1
@1ebfb8 store little v55, v56+12
@1ebfbf v57 = iconst.i32 12
@1ebfc1 v58 = iadd.i32 v19, v57
@1ebfc2 v59 = iconst.i32 0x0050_e258
@1ebfc8 v60 = iadd_imm v53, 11
@1ebfc8 store notrap aligned v60, v34+8
@1ebfc8 v61 = call fn1(v0, v0, v19, v58, v59)
@1ebfc8 v62 = load.i64 notrap aligned v34+8
@1ebfd1 v63 = iadd_imm v62, 2
@1ebfd1 store notrap aligned v63, v34+8
@1ebfd1 v64 = call fn2(v0, v0, v19)
@1ebfd1 v65 = load.i64 notrap aligned v34+8
@1ebfd9 v66 = iadd_imm v65, 2
@1ebfd9 jump block4(v19, v64, v66, v34)
block8:
@1ebfe0 v67 = iconst.i32 0x0050_e22f
@1ebfe6 v68 = iconst.i32 10
@1ebfe8 v69 = iadd_imm.i64 v25, 5
@1ebfe8 store notrap aligned v69, v34+8
@1ebfe8 call fn0(v0, v0, v19, v28, v67, v68)
@1ebfe8 v70 = load.i64 notrap aligned v34+8
@1ebff2 v71 = iconst.i32 4
@1ebff4 v72 = iadd.i32 v21, v71
@1ebff5 v73 = heap_addr.i64 heap0, v19, 1
@1ebff5 store little v72, v73+12
@1ebffc v74 = iconst.i32 12
@1ebffe v75 = iadd.i32 v19, v74
@1ebfff v76 = iconst.i32 0x0050_e23c
@1ec005 v77 = iadd_imm v70, 11
@1ec005 store notrap aligned v77, v34+8
@1ec005 v78 = call fn1(v0, v0, v19, v75, v76)
@1ec005 v79 = load.i64 notrap aligned v34+8
@1ec00e v80 = iadd_imm v79, 2
@1ec00e store notrap aligned v80, v34+8
@1ec00e v81 = call fn2(v0, v0, v19)
@1ec00e v82 = load.i64 notrap aligned v34+8
@1ec016 v83 = iadd_imm v82, 2
@1ec016 jump block4(v19, v81, v83, v34)
block7:
@1ec01d v84 = iconst.i32 0x0050_e221
@1ec023 v85 = iconst.i32 5
@1ec025 v86 = iadd_imm.i64 v25, 5
@1ec025 store notrap aligned v86, v34+8
@1ec025 v87 = call fn3(v0, v0, v28, v84, v85)
@1ec025 v88 = load.i64 notrap aligned v34+8
@1ec02b v89 = heap_addr.i64 heap0, v19, 1
@1ec02b store little v87, v89
@1ec032 v90 = iconst.i32 1
@1ec034 v91 = iadd.i32 v21, v90
@1ec035 v92 = heap_addr.i64 heap0, v19, 1
@1ec035 store little v91, v92+12
@1ec03a v93 = iconst.i32 0x0050_e226
@1ec040 v94 = iconst.i32 9
@1ec044 v95 = iconst.i32 12
@1ec046 v96 = iadd.i32 v19, v95
@1ec047 v97 = iconst.i32 0x0050_e200
@1ec04d v98 = iadd_imm v88, 14
@1ec04d store notrap aligned v98, v34+8
@1ec04d v99 = call fn4(v0, v0, v19, v93, v94, v96, v97)
@1ec04d v100 = load.i64 notrap aligned v34+8
@1ec056 v101 = iadd_imm v100, 2
@1ec056 store notrap aligned v101, v34+8
@1ec056 v102 = call fn5(v0, v0, v19)
@1ec056 v103 = load.i64 notrap aligned v34+8
@1ec05e v104 = iadd_imm v103, 2
@1ec05e jump block4(v19, v102, v104, v34)
block6:
@1ec063 v105 = iconst.i32 0x0050_e21b
@1ec069 v106 = iconst.i32 6
@1ec06b v107 = iadd_imm.i64 v25, 4
@1ec06b store notrap aligned v107, v34+8
@1ec06b v108 = call fn6(v0, v0, v28, v105, v106)
@1ec06b v109 = load.i64 notrap aligned v34+8
@1ec073 v110 = iadd_imm v109, 2
@1ec073 jump block4(v19, v108, v110, v34)
block5:
@1ec078 v111 = iconst.i32 0x0050_e210
@1ec07e v112 = iconst.i32 11
@1ec080 v113 = iadd_imm.i64 v25, 4
@1ec080 store notrap aligned v113, v34+8
@1ec080 v114 = call fn6(v0, v0, v28, v111, v112)
@1ec080 v115 = load.i64 notrap aligned v34+8
@1ec088 v116 = iadd_imm v115, 1
@1ec088 jump block4(v19, v114, v116, v34)
block4(v117: i32, v121: i32, v122: i64, v124: i64):
@1ec08b v118 = iconst.i32 16
@1ec08d v119 = iadd v117, v118
@1ec08e v120 = global_value.i64 gv3
@1ec08e store notrap aligned v119, v120+1104
@1ec096 v123 = iadd_imm v122, 5
@1ec096 jump block1(v121)
block1(v4: i32):
@1ec096 store.i64 notrap aligned v123, v124+8
@1ec096 return v4
}
May 17 08:04:03.255 DEBUG timing: Starting Control flow graph, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Starting VCode lowering, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Control flow graph
May 17 08:04:03.255 DEBUG timing: Starting Pre-legalization rewriting, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Pre-legalization rewriting
May 17 08:04:03.255 DEBUG timing: Starting Dominator tree, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Dominator tree
May 17 08:04:03.255 DEBUG timing: Starting Loop analysis, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Loop analysis
May 17 08:04:03.255 DEBUG timing: Starting Loop invariant code motion, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Starting Control flow graph, (during Loop invariant code motion)
May 17 08:04:03.255 DEBUG timing: Ending Control flow graph
May 17 08:04:03.255 DEBUG timing: Starting Dominator tree, (during Loop invariant code motion)
May 17 08:04:03.255 DEBUG timing: Ending Dominator tree
May 17 08:04:03.255 DEBUG timing: Ending VCode lowering
May 17 08:04:03.255 DEBUG timing: Ending Loop invariant code motion
May 17 08:04:03.255 DEBUG timing: Starting Global value numbering, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Translate WASM function
May 17 08:04:03.255 DEBUG timing: Ending Translate WASM function
May 17 08:04:03.255 DEBUG timing: Starting Compilation passes, (during <no pass>)
May 17 08:04:03.255 DEBUG timing: Ending Global value numbering
May 17 08:04:03.255 DEBUG timing: Starting Compilation passes, (during <no pass>)
May 17 08:04:03.255 DEBUG timing: Starting Dominator tree, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Starting Register allocation, (during Compilation passes)
May 17 08:04:03.255 DEBUG timing: Ending Dominator tree
May 17 08:04:03.255 DEBUG
May 17 08:04:03.255 DEBUG ================ regalloc.rs: BEGIN function ================
May 17 08:04:03.255 DEBUG timing: Starting Remove unreachable blocks, (during Compilation passes)
May 17 08:04:03.255 DEBUG with options: checker: false, algorithm: backtracking (block annotations: false)
May 17 08:04:03.255 DEBUG timing: Ending Remove unreachable blocks
May 17 08:04:03.255 DEBUG timing: Starting Dead code elimination, (during Compilation passes)
May 17 08:04:03.255 DEBUG using RealRegUniverse:
May 17 08:04:03.255 DEBUG class I32(J) at [16 .. 29]: %rsi %rdi %rax %rcx %rdx %r8 %r9 %r10 %r11 %r12* %r13 %r14 %rbx %r15
May 17 08:04:03.255 DEBUG class V128(V) at [0 .. 15]: %xmm0 %xmm1 %xmm2 %xmm3 %xmm4 %xmm5 %xmm6 %xmm7 %xmm8 %xmm9 %xmm10 %xmm11 %xmm12 %xmm13 %xmm14 %xmm15*
May 17 08:04:03.255 DEBUG timing: Ending Dead code elimination
May 17 08:04:03.255 DEBUG timing: Starting Remove constant phi-nodes, (during Compilation passes)
May 17 08:04:03.255 DEBUG not allocable at [30 .. 31]: %rsp %rbp
May 17 08:04:03.255 DEBUG do_remove_constant_phis: done, 2 iters. 8 formals, of which 4 const.
May 17 08:04:03.255 DEBUG timing: Ending Remove constant phi-nodes
May 17 08:04:03.255 DEBUG alloc_main: begin
May 17 08:04:03.255 DEBUG alloc_main: in: 30 insns in 6 blocks
May 17 08:04:03.255 DEBUG alloc_main: in: 12 VLRs, 55 RLRs
May 17 08:04:03.255 DEBUG timing: Ending Translate WASM function
May 17 08:04:03.255 DEBUG timing: Ending Translate WASM function
May 17 08:04:03.255 DEBUG
May 17 08:04:03.255 DEBUG timing: Starting Compilation passes, (during <no pass>)
May 17 08:04:03.255 DEBUG <<<<====---- RA state at 'Initial' ----====
May 17 08:04:03.255 DEBUG TODO vr2 = (VR: v2J, sz=27, tc=7, sc=0.259, [(RF: i2.d-i28.u)])
May 17 08:04:03.255 DEBUG TODO vr3 = (VR: v5J, sz=7, tc=4, sc=0.571, [(RF: i4.d-i9.u), (RF: i18.u-i18.u)])
May 17 08:04:03.255 DEBUG TODO vr0 = (VR: v0J, sz=25, tc=6, sc=0.240, [(RF: i0.d-i24.u)])
May 17 08:04:03.255 DEBUG Compiling (opt level Speed):
function u0:1278(i64 vmctx, i64, i32, i32, i32) wasmtime_system_v {
gv0 = vmctx
gv1 = load.i64 notrap aligned readonly gv0
gv2 = load.i64 notrap aligned gv1
gv3 = vmctx
sig0 = (i64 vmctx) wasmtime_system_v
sig1 = (i64 vmctx, i64, i32, i32, i32) fast
sig2 = (i64 vmctx, i64) -> i64 fast
fn0 = colocated u0:1605 sig1
fn1 = colocated u0:1576 sig2
stack_limit = gv2
block0(v0: i64, v1: i64, v2: i32, v3: i32, v4: i32):
v15 -> v2
v16 -> v3
v17 -> v4
@d1e51 v5 = global_value.i64 gv3
@d1e51 v6 = load.i64 notrap aligned v5
v20 -> v6
@d1e51 v7 = load.i64 notrap aligned v6+8
@d1e51 v8 = iadd_imm v7, 1
@d1e51 v9 = iconst.i64 0
@d1e51 v10 = ifcmp v8, v9
@d1e51 brif sge v10, block2
@d1e51 jump block3(v8)
block2:
@d1e51 store.i64 notrap aligned v8, v6+8
@d1e51 v11 = global_value.i64 gv3
@d1e51 v12 = load.i64 notrap aligned readonly v11+0x0001_db38
@d1e51 v13 = load.i64 notrap aligned readonly v12+152
@d1e51 call_indirect sig0, v13(v11)
@d1e51 v14 = load.i64 notrap aligned v6+8
@d1e51 jump block3(v14)
block3(v18: i64):
@d1e58 v19 = iadd_imm v18, 4
@d1e58 store notrap aligned v19, v6+8
@d1e58 call fn0(v0, v0, v2, v3, v4)
@d1e58 v21 = load.i64 notrap aligned v20+8
@d1e5e v22 = iadd_imm v21, 1
@d1e5e store notrap aligned v22, v20+8
@d1e5e v23 = call fn1(v0, v0)
@d1e5e v24 = load.i64 notrap aligned v20+8
@d1e65 v25 = iadd_imm v24, 1
@d1e65 store notrap aligned v25, v20+8
@d1e65 v26 = call fn1(v0, v0)
@d1e65 v27 = load.i64 notrap aligned v20+8
@d1e6c jump block1
block1:
@d1e6c store.i64 notrap aligned v27, v20+8
@d1e6c return
}
May 17 08:04:03.255 DEBUG timing: Starting Control flow graph, (during Compilation passes)
May 17 08:04:03.255 DEBUG TODO vr7 = (VR: v11J, sz=5, tc=0, sc=0.000, [(RF: i16.d-i17.d), (RF: i18.d-i20.u)])
May 17 08:04:03.255 DEBUG timing: Ending Control flow graph
May 17 08:04:03.255 DEBUG TODO vr9 = (VR: v13J, sz=3, tc=2, sc=0.667, [(RF: i26.d-i28.u)])
May 17 08:04:03.255 DEBUG timing: Starting Pre-legalization rewriting, (during Compilation passes)
May 17 08:04:03.255 DEBUG TODO vr5 = (VR: v9J, sz=3, tc=2, sc=0.667, [(RF: i11.d-i13.u)])
May 17 08:04:03.255 DEBUG TODO vr6 = (VR: v10J, sz=3, tc=1, sc=0.333, [(RF: i14.d-i16.u)])
May 17 08:04:03.255 DEBUG TODO vr1 = (VR: v1J, sz=1, tc=1, sc=1.000, [(RF: i1.d-i1.d)])
May 17 08:04:03.255 DEBUG TODO vr8 = (VR: v12J, sz=3, tc=3, sc=1.000, [(RF: i20.d-i22.u)])
May 17 08:04:03.255 DEBUG timing: Ending Pre-legalization rewriting
May 17 08:04:03.255 DEBUG timing: Starting VCode lowering, (during Compilation passes)
May 17 08:04:03.255 DEBUG TODO vr4 = (VR: v8J, sz=2, tc=2, sc=1.000, [(RF: i10.d-i11.u)])
May 17 08:04:03.255 DEBUG TODO vr10 = (VR: v17J, sz=2, tc=2, sc=1.000, [(RF: i6.d-i7.u)])
May 17 08:04:03.255 DEBUG TODO vr11 = (VR: v18J, sz=2, tc=1, sc=0.500, [(RF: i3.d-i4.u)])
May 17 08:04:03.255 DEBUG >>>>
May 17 08:04:03.255 DEBUG
May 17 08:04:03.255 DEBUG -- MAIN ALLOCATION LOOP (DI means 'direct', CO means 'coalesced'):
May 17 08:04:03.255 DEBUG alloc_main: main allocation loop: begin
May 17 08:04:03.255 DEBUG -- still TODO 12
May 17 08:04:03.255 DEBUG -- considering vr2: (VR: v2J, sz=27, tc=7, sc=0.259, [(RF: i2.d-i28.u)])
May 17 08:04:03.255 DEBUG -- DI alloc to %r12
May 17 08:04:03.255 DEBUG -- still TODO 11
May 17 08:04:03.255 DEBUG -- considering vr0: (VR: v0J, sz=25, tc=6, sc=0.240, [(RF: i0.d-i24.u)])
May 17 08:04:03.255 DEBUG -- CO candidates pri { %rdi %rsi }
May 17 08:04:03.255 DEBUG -- DI alloc to %r13
May 17 08:04:03.255 DEBUG -- still TODO 10
May 17 08:04:03.255 DEBUG -- considering vr3: (VR: v5J, sz=7, tc=4, sc=0.571, [(RF: i4.d-i9.u), (RF: i18.u-i18.u)])
May 17 08:04:03.255 DEBUG -- DI alloc to %rsi
May 17 08:04:03.255 DEBUG -- still TODO 9
May 17 08:04:03.255 DEBUG -- considering vr7: (VR: v11J, sz=5, tc=0, sc=0.000, [(RF: i16.d-i17.d), (RF: i18.d-i20.u)])
May 17 08:04:03.255 DEBUG -- CO candidates pri { %rsi }
May 17 08:04:03.255 DEBUG -- CO alloc to %rsi
May 17 08:04:03.255 DEBUG -- still TODO 8
May 17 08:04:03.255 DEBUG -- considering vr5: (VR: v9J, sz=3, tc=2, sc=0.667, [(RF: i11.d-i13.u)])
May 17 08:04:03.255 DEBUG -- DI alloc to %rsi
May 17 08:04:03.255 DEBUG -- still TODO 7
May 17 08:04:03.255 DEBUG -- considering vr6: (VR: v10J, sz=3, tc=1, sc=0.333, [(RF: i14.d-i16.u)])
May 17 08:04:03.255 DEBUG -- CO candidates pri { %rsi }
May 17 08:04:03.255 DEBUG -- CO alloc to %rsi
May 17 08:04:03.255 DEBUG -- still TODO 6
May 17 08:04:03.255 DEBUG -- considering vr8: (VR: v12J, sz=3, tc=3, sc=1.000, [(RF: i20.d-i22.u)])
May 17 08:04:03.255 DEBUG -- CO candidates pri { %rsi }
May 17 08:04:03.255 DEBUG -- CO alloc to %rsi
May 17 08:04:03.255 DEBUG -- still TODO 5
May 17 08:04:03.255 DEBUG -- considering vr9: (VR: v13J, sz=3, tc=2, sc=0.667, [(RF: i26.d-i28.u)])
May 17 08:04:03.255 DEBUG -- DI alloc to %rsi
May 17 08:04:03.255 DEBUG -- still TODO 4
May 17 08:04:03.255 DEBUG -- considering vr4: (VR: v8J, sz=2, tc=2, sc=1.000, [(RF: i10.d-i11.u)])
May 17 08:04:03.255 DEBUG -- DI alloc to %rsi
May 17 08:04:03.255 DEBUG -- still TODO 3
May 17 08:04:03.255 DEBUG -- considering vr10: (VR: v17J, sz=2, tc=2, sc=1.000, [(RF: i6.d-i7.u)])
May 17 08:04:03.255 DEBUG -- DI alloc to %rdi
May 17 08:04:03.255 DEBUG -- still TODO 2
May 17 08:04:03.255 DEBUG -- considering vr11: (VR: v18J, sz=2, tc=1, sc=0.500, [(RF: i3.d-i4.u)])
May 17 08:04:03.255 DEBUG -- CO candidates pri { %rsi }
May 17 08:04:03.255 DEBUG -- CO alloc to %rsi
May 17 08:04:03.255 DEBUG -- still TODO 1
May 17 08:04:03.255 DEBUG -- considering vr1: (VR: v1J, sz=1, tc=1, sc=1.000, [(RF: i1.d-i1.d)])
May 17 08:04:03.255 DEBUG -- CO candidates pri { %rsi }
May 17 08:04:03.255 DEBUG -- CO alloc to %rsi
May 17 08:04:03.255 DEBUG -- still TODO 0
May 17 08:04:03.255 DEBUG alloc_main: main allocation loop: end
May 17 08:04:03.255 DEBUG
May 17 08:04:03.255 DEBUG <<<<====---- RA state at 'Final' ----====
May 17 08:04:03.255 DEBUG >>>>
May 17 08:04:03.255 DEBUG
May 17 08:04:03.255 DEBUG alloc_main: create spills_n_reloads for MOVE insns
May 17 08:04:03.255 DEBUG
May 17 08:04:03.255 DEBUG alloc_main: create spills_n_reloads for other insns
May 17 08:04:03.255 DEBUG alloc_main: create frag_map
May 17 08:04:03.255 DEBUG timing: Ending VCode lowering
May 17 08:04:03.255 DEBUG alloc_main: edit_inst_stream
May 17 08:04:03.255 DEBUG timing: Starting Register allocation, (during Compilation passes)
May 17 08:04:03.255 DEBUG
May 17 08:04:03.255 DEBUG ================ regalloc.rs: BEGIN function ================
May 17 08:04:03.255 DEBUG Compiling (opt level Speed):
function u0:662(i64 vmctx, i64, i32, i32, i32) wasmtime_system_v {
gv0 = vmctx
gv1 = load.i64 notrap aligned readonly gv0
gv2 = load.i64 notrap aligned gv1
gv3 = vmctx
gv4 = load.i64 notrap aligned readonly gv3+1076
heap0 = static gv4, min 0, bound 0x0001_0000_0000, offset_guard 0x8000_0000, index_type i32
sig0 = (i64 vmctx) wasmtime_system_v
sig1 = (i64 vmctx, i64, i32) -> i32 fast
sig2 = (i64 vmctx, i64, i32, i32, i32) -> i32 fast
sig3 = (i64 vmctx, i64, i32, i32) fast
sig4 = (i64 vmctx, i64, i32, i32, i32) fast
sig5 = (i64 vmctx, i64, i32, i32) fast
sig6 = (i64 vmctx, i64, i32, i32) fast
sig7 = (i64 vmctx, i64, i32) fast
sig8 = (i64 vmctx, i64, i32, i32) fast
sig9 = (i64 vmctx, i64, i32, i32, i32) fast
sig10 = (i64 vmctx, i64, i32, i32) fast
sig11 = (i64 vmctx, i64, i32) fast
sig12 = (i64 vmctx, i64, i32, i32, i32) fast
sig13 = (i64 vmctx, i64, i32, i32, i32) fast
sig14 = (i64 vmctx, i64, i32) fast
sig15 = (i64 vmctx, i64, i32, i32) fast
sig16 = (i64 vmctx, i64, i32) -> i32 fast
sig17 = (i64 vmctx, i64, i32) fast
sig18 = (i64 vmctx, i64, i32) fast
sig19 = (i64 vmctx, i64, i32, i32, i32) fast
fn0 = colocated u0:4029 sig1
fn1 = colocated u0:4752 sig2
fn2 = colocated u0:4325 sig3
fn3 = colocated u0:4171 sig4
fn4 = colocated u0:1070 sig5
fn5 = colocated u0:564 sig6
fn6 = colocated u0:3211 sig7
fn7 = colocated u0:3212 sig8
fn8 = colocated u0:3210 sig9
fn9 = colocated u0:3065 sig10
fn10 = colocated u0:3950 sig11
fn11 = colocated u0:1047 sig12
fn12 = colocated u0:112 sig13
fn13 = colocated u0:655 sig14
fn14 = colocated u0:3208 sig15
fn15 = colocated u0:3937 sig16
fn16 = colocated u0:657 sig17
fn17 = colocated u0:656 sig18
fn18 = colocated u0:3882 sig19
stack_limit = gv2
block0(v0: i64, v1: i64, v2: i32, v3: i32, v4: i32):
v343 -> v2
v22 -> v3
v474 -> v4
@76093 v5 = iconst.i32 0
@76095 v6 = iconst.i64 0
@76095 v7 = global_value.i64 gv3
@76095 v8 = load.i64 notrap aligned v7
v25 -> v8
@76095 v9 = load.i64 notrap aligned v8+8
@76095 v10 = iadd_imm v9, 1
@76095 v11 = iconst.i64 0
@76095 v12 = ifcmp v10, v11
@76095 brif sge v12, block2
@76095 jump block3(v10)
block2:
@76095 store.i64 notrap aligned v10, v8+8
@76095 v13 = global_value.i64 gv3
@76095 v14 = load.i64 notrap aligned readonly v13+0x0001_db38
@76095 v15 = load.i64 notrap aligned readonly v14+152
@76095 call_indirect sig0, v15(v13)
@76095 v16 = load.i64 notrap aligned v8+8
@76095 jump block3(v16)
block3(v23: i64):
@76097 v17 = global_value.i64 gv3
@76097 v18 = load.i32 notrap aligned v17+1104
@7609d v19 = iconst.i32 1328
@760a0 v20 = isub v18, v19
@760a3 v21 = global_value.i64 gv3
@760a3 store notrap aligned v20, v21+1104
@760b5 v24 = iadd_imm v23, 7
@760b5 store notrap aligned v24, v8+8
@760b5 v26 = call fn0(v0, v0, v3)
@760b5 v27 = load.i64 notrap aligned v25+8
@760bb v28 = heap_addr.i64 heap0, v26, 1
@760bb v29 = uload8.i32 little v28
@760be v30 = iconst.i32 1
@760c0 v31 = icmp ne v29, v30
@760c0 v32 = bint.i32 v31
@760c1 v33 = iadd_imm v27, 4
@760c1 brnz v32, block8
@760c1 jump block9
block9:
@760c5 v34 = iconst.i32 24
@760c7 v35 = iadd.i32 v20, v34
@760ca v36 = iconst.i32 288
@760cd v37 = iadd_imm.i64 v33, 6
@760cd store notrap aligned v37, v25+8
@760cd v38 = call fn1(v0, v0, v35, v22, v36)
@760cd v39 = load.i64 notrap aligned v25+8
@760d6 v40 = iconst.i32 16
@760d8 v41 = iadd.i32 v20, v40
@760db v42 = iconst.i32 108
@760de v43 = iadd.i32 v20, v42
@760df v44 = iadd_imm v39, 7
@760df store notrap aligned v44, v25+8
@760df call fn2(v0, v0, v41, v43)
@760df v45 = load.i64 notrap aligned v25+8
@760e7 v46 = iconst.i32 496
@760ea v47 = iadd.i32 v20, v46
@760ed v48 = heap_addr.i64 heap0, v20, 1
@760ed v49 = load.i32 little v48+16
@760f2 v50 = iconst.i32 0x0010_7690
@760fa v51 = select v49, v49, v50
@760fd v52 = heap_addr.i64 heap0, v20, 1
@760fd v53 = load.i32 little v52+20
@76100 v54 = iconst.i32 0
@76104 v55 = select v49, v53, v54
@76105 v56 = iadd_imm v45, 15
@76105 store notrap aligned v56, v25+8
@76105 call fn3(v0, v0, v47, v51, v55)
@76105 v57 = load.i64 notrap aligned v25+8
@7610d v58 = iconst.i32 608
@76110 v59 = iadd.i32 v20, v58
@76111 v60 = iconst.i32 24
@76113 v61 = iadd v59, v60
@76116 v62 = iconst.i32 496
@76119 v63 = iadd.i32 v20, v62
@7611a v64 = iconst.i32 24
@7611c v65 = iadd v63, v64
@7611d v66 = heap_addr.i64 heap0, v65, 1
@7611d v67 = load.i32 little v66
@76120 v68 = heap_addr.i64 heap0, v61, 1
@76120 store little v67, v68
@76125 v69 = iconst.i32 608
@76128 v70 = iadd.i32 v20, v69
@76129 v71 = iconst.i32 16
@7612b v72 = iadd v70, v71
@7612e v73 = iconst.i32 496
@76131 v74 = iadd.i32 v20, v73
@76132 v75 = iconst.i32 16
@76134 v76 = iadd v74, v75
@76135 v77 = heap_addr.i64 heap0, v76, 1
@76135 v78 = load.i64 little v77
@76138 v79 = heap_addr.i64 heap0, v72, 1
@76138 store little v78, v79
@7613d v80 = iconst.i32 608
@76140 v81 = iadd.i32 v20, v80
@76141 v82 = iconst.i32 8
@76143 v83 = iadd v81, v82
@76146 v84 = iconst.i32 496
@76149 v85 = iadd.i32 v20, v84
@7614a v86 = iconst.i32 8
@7614c v87 = iadd v85, v86
@7614d v88 = heap_addr.i64 heap0, v87, 1
@7614d v89 = load.i64 little v88
@76150 v90 = heap_addr.i64 heap0, v83, 1
@76150 store little v89, v90
@76157 v91 = heap_addr.i64 heap0, v20, 1
@76157 v92 = load.i64 little v91+496
@7615b v93 = heap_addr.i64 heap0, v20, 1
@7615b store little v92, v93+608
@76161 v94 = iconst.i32 904
@76164 v95 = iadd.i32 v20, v94
@76167 v96 = iconst.i32 608
@7616a v97 = iadd.i32 v20, v96
@7616b v98 = iadd_imm v57, 47
@7616b store notrap aligned v98, v25+8
@7616b call fn4(v0, v0, v95, v97)
@7616b v99 = load.i64 notrap aligned v25+8
@76173 v100 = iconst.i32 904
@76176 v101 = iadd.i32 v20, v100
@76177 v102 = iconst.i32 8
@76179 v103 = iadd v101, v102
@7617c v104 = heap_addr.i64 heap0, v103, 1
@7617c v105 = load.i32 little v104
@76183 v106 = heap_addr.i64 heap0, v20, 1
@76183 v107 = load.i32 little v106+908
@7618b v108 = heap_addr.i64 heap0, v20, 1
@7618b v109 = load.i32 little v108+904
@7618f v110 = iadd_imm v99, 14
@7618f brnz v109, block7
@7618f jump block10
block10:
@76193 v111 = iconst.i32 904
@76196 v112 = iadd.i32 v20, v111
@76197 v113 = iconst.i32 12
@76199 v114 = iadd v112, v113
@7619a v115 = heap_addr.i64 heap0, v114, 1
@7619a v116 = load.i32 little v115
@761a1 v117 = iconst.i32 312
@761a4 v118 = iadd.i32 v20, v117
@761a7 v119 = iconst.i32 904
@761aa v120 = iadd.i32 v20, v119
@761ab v121 = iconst.i32 16
@761ad v122 = iadd v120, v121
@761ae v123 = iconst.i32 96
@761b1 v124 = iadd_imm.i64 v110, 17
@761b1 store notrap aligned v124, v25+8
@761b1 v125 = call fn1(v0, v0, v118, v122, v123)
@761b1 v126 = load.i64 notrap aligned v25+8
@761ba v127 = iconst.i32 608
@761bd v128 = iadd.i32 v20, v127
@761c0 v129 = iconst.i32 312
@761c3 v130 = iadd.i32 v20, v129
@761c4 v131 = iconst.i32 96
@761c7 v132 = iadd_imm v126, 8
@761c7 store notrap aligned v132, v25+8
@761c7 v133 = call fn1(v0, v0, v128, v130, v131)
@761c7 v134 = load.i64 notrap aligned v25+8
@761d2 v135 = heap_addr.i64 heap0, v103, 1
@761d2 store little v116, v135
@761d7 v136 = iconst.i32 904
@761da v137 = iadd.i32 v20, v136
@761db v138 = iconst.i32 20
@761dd v139 = iadd v137, v138
@761e0 v140 = iconst.i32 608
@761e3 v141 = iadd.i32 v20, v140
@761e4 v142 = iconst.i32 68
@761e7 v143 = iadd v141, v142
@761e8 v144 = heap_addr.i64 heap0, v143, 1
@761e8 v145 = load.i32 little v144
@761eb v146 = heap_addr.i64 heap0, v139, 1
@761eb store little v145, v146
@761f0 v147 = iconst.i32 904
@761f3 v148 = iadd.i32 v20, v147
@761f4 v149 = iconst.i32 32
@761f6 v150 = iadd v148, v149
@761f9 v151 = iconst.i32 312
@761fc v152 = iadd.i32 v20, v151
@761fd v153 = iconst.i32 8
@761ff v154 = iadd v152, v153
@76200 v155 = heap_addr.i64 heap0, v154, 1
@76200 v156 = load.i32 little v155
@76203 v157 = heap_addr.i64 heap0, v150, 1
@76203 store little v156, v157
@76208 v158 = iconst.i32 904
@7620b v159 = iadd.i32 v20, v158
@7620c v160 = iconst.i32 44
@7620e v161 = iadd v159, v160
@76211 v162 = iconst.i32 608
@76214 v163 = iadd.i32 v20, v162
@76215 v164 = iconst.i32 20
@76217 v165 = iadd v163, v164
@76218 v166 = heap_addr.i64 heap0, v165, 1
@76218 v167 = load.i32 little v166
@7621b v168 = heap_addr.i64 heap0, v161, 1
@7621b store little v167, v168
@76220 v169 = iconst.i32 904
@76223 v170 = iadd.i32 v20, v169
@76224 v171 = iconst.i32 56
@76226 v172 = iadd v170, v171
@76229 v173 = iconst.i32 608
@7622c v174 = iadd.i32 v20, v173
@7622d v175 = iconst.i32 32
@7622f v176 = iadd v174, v175
@76230 v177 = heap_addr.i64 heap0, v176, 1
@76230 v178 = load.i32 little v177
@76233 v179 = heap_addr.i64 heap0, v172, 1
@76233 store little v178, v179
@7623a v180 = heap_addr.i64 heap0, v20, 1
@7623a store.i32 little v105, v180+908
@76242 v181 = heap_addr.i64 heap0, v20, 1
@76242 store.i32 little v107, v181+904
@7624a v182 = heap_addr.i64 heap0, v20, 1
@7624a v183 = load.i64 little v182+668
@7624e v184 = heap_addr.i64 heap0, v20, 1
@7624e store little v183, v184+916
@76256 v185 = heap_addr.i64 heap0, v20, 1
@76256 v186 = load.i64 little v185+312
@7625a v187 = heap_addr.i64 heap0, v20, 1
@7625a store little v186, v187+928
@76262 v188 = heap_addr.i64 heap0, v20, 1
@76262 v189 = load.i64 little v188+620
@76266 v190 = heap_addr.i64 heap0, v20, 1
@76266 store little v189, v190+940
@7626e v191 = heap_addr.i64 heap0, v20, 1
@7626e v192 = load.i64 little v191+632
@76272 v193 = heap_addr.i64 heap0, v20, 1
@76272 store little v192, v193+952
@76278 v194 = iconst.i32 904
@7627b v195 = iadd.i32 v20, v194
@7627c v196 = iconst.i32 68
@7627f v197 = iadd v195, v196
@76282 v198 = iconst.i32 608
@76285 v199 = iadd.i32 v20, v198
@76286 v200 = iconst.i32 44
@76288 v201 = iadd v199, v200
@76289 v202 = heap_addr.i64 heap0, v201, 1
@76289 v203 = load.i32 little v202
@7628c v204 = heap_addr.i64 heap0, v197, 1
@7628c store little v203, v204
@76291 v205 = iconst.i32 904
@76294 v206 = iadd.i32 v20, v205
@76295 v207 = iconst.i32 80
@76298 v208 = iadd v206, v207
@7629b v209 = iconst.i32 608
@7629e v210 = iadd.i32 v20, v209
@7629f v211 = iconst.i32 56
@762a1 v212 = iadd v210, v211
@762a2 v213 = heap_addr.i64 heap0, v212, 1
@762a2 v214 = load.i32 little v213
@762a5 v215 = heap_addr.i64 heap0, v208, 1
@762a5 store little v214, v215
@762aa v216 = iconst.i32 904
@762ad v217 = iadd.i32 v20, v216
@762ae v218 = iconst.i32 92
@762b1 v219 = iadd v217, v218
@762b4 v220 = iconst.i32 608
@762b7 v221 = iadd.i32 v20, v220
@762b8 v222 = iconst.i32 80
@762bb v223 = iadd v221, v222
@762bc v224 = heap_addr.i64 heap0, v223, 1
@762bc v225 = load.i32 little v224
@762bf v226 = heap_addr.i64 heap0, v219, 1
@762bf store little v225, v226
@762c4 v227 = iconst.i32 1008
@762c7 v228 = iadd.i32 v20, v227
@762ca v229 = iconst.i32 608
@762cd v230 = iadd.i32 v20, v229
@762ce v231 = iconst.i32 92
@762d1 v232 = iadd v230, v231
@762d2 v233 = heap_addr.i64 heap0, v232, 1
@762d2 v234 = load.i32 little v233
@762d5 v235 = heap_addr.i64 heap0, v228, 1
@762d5 store little v234, v235
@762dc v236 = heap_addr.i64 heap0, v20, 1
@762dc v237 = load.i64 little v236+644
@762e0 v238 = heap_addr.i64 heap0, v20, 1
@762e0 store little v237, v238+964
@762e8 v239 = heap_addr.i64 heap0, v20, 1
@762e8 v240 = load.i64 little v239+656
@762ec v241 = heap_addr.i64 heap0, v20, 1
@762ec store little v240, v241+976
@762f4 v242 = heap_addr.i64 heap0, v20, 1
@762f4 v243 = load.i64 little v242+680
@762f8 v244 = heap_addr.i64 heap0, v20, 1
@762f8 store little v243, v244+988
@76300 v245 = heap_addr.i64 heap0, v20, 1
@76300 v246 = load.i64 little v245+692
@76304 v247 = heap_addr.i64 heap0, v20, 1
@76304 store little v246, v247+1000
@7630a v248 = iconst.i32 496
@7630d v249 = iadd.i32 v20, v248
@76310 v250 = iconst.i32 904
@76313 v251 = iadd.i32 v20, v250
@76314 v252 = iadd_imm v134, 142
@76314 store notrap aligned v252, v25+8
@76314 call fn5(v0, v0, v249, v251)
@76314 v253 = load.i64 notrap aligned v25+8
@7631c v254 = iconst.i32 496
@7631f v255 = iadd.i32 v20, v254
@76320 v256 = iconst.i32 4
@76322 v257 = bor v255, v256
@76327 v258 = heap_addr.i64 heap0, v20, 1
@76327 v259 = load.i32 little v258+496
@7632b v260 = iadd_imm v253, 9
@7632b brnz v259, block6
@7632b jump block11
block11:
@7632f v261 = iconst.i32 720
@76332 v262 = iadd.i32 v20, v261
@76335 v263 = iconst.i32 76
@76338 v264 = iadd_imm.i64 v260, 6
@76338 store notrap aligned v264, v25+8
@76338 v265 = call fn1(v0, v0, v262, v257, v263)
@76338 v266 = load.i64 notrap aligned v25+8
@76341 v267 = iconst.i32 408
@76344 v268 = iadd.i32 v20, v267
@76347 v269 = iconst.i32 720
@7634a v270 = iadd.i32 v20, v269
@7634b v271 = iconst.i32 76
@7634e v272 = iadd_imm v266, 8
@7634e store notrap aligned v272, v25+8
@7634e v273 = call fn1(v0, v0, v268, v270, v271)
@7634e v274 = load.i64 notrap aligned v25+8
@76357 v275 = iconst.i32 8
@76359 v276 = iadd.i32 v20, v275
@7635a v277 = iadd_imm v274, 4
@7635a store notrap aligned v277, v25+8
@7635a call fn6(v0, v0, v276)
@7635a v278 = load.i64 notrap aligned v25+8
@76364 v279 = heap_addr.i64 heap0, v20, 1
@76364 v280 = load.i64 little v279+8
@76367 v281 = heap_addr.i64 heap0, v20, 1
@76367 store little v280, v281+488
@7636d v282 = iconst.i32 824
@76370 v283 = iadd.i32 v20, v282
@76373 v284 = iconst.i32 408
@76376 v285 = iadd.i32 v20, v284
@76377 v286 = iconst.i32 76
@7637a v287 = iadd_imm v278, 12
@7637a store notrap aligned v287, v25+8
@7637a v288 = call fn1(v0, v0, v283, v285, v286)
@7637a v289 = load.i64 notrap aligned v25+8
@76383 v290 = iconst.i32 720
@76386 v291 = iadd.i32 v20, v290
@76389 v292 = iconst.i32 824
@7638c v293 = iadd.i32 v20, v292
@7638d v294 = iadd_imm v289, 7
@7638d store notrap aligned v294, v25+8
@7638d call fn7(v0, v0, v291, v293)
@7638d v295 = load.i64 notrap aligned v25+8
@76395 v296 = iconst.i32 904
@76398 v297 = iadd.i32 v20, v296
@7639b v298 = iconst.i32 488
@7639e v299 = iadd.i32 v20, v298
@763a1 v300 = iconst.i32 720
@763a4 v301 = iadd.i32 v20, v300
@763a5 v302 = iadd_imm v295, 10
@763a5 store notrap aligned v302, v25+8
@763a5 call fn8(v0, v0, v297, v299, v301)
@763a5 v303 = load.i64 notrap aligned v25+8
@763ad v304 = iconst.i32 904
@763b0 v305 = iadd.i32 v20, v304
@763b1 v306 = iconst.i32 4
@763b3 v307 = bor v305, v306
@763ba v308 = heap_addr.i64 heap0, v20, 1
@763ba v309 = load.i32 little v308+904
@763be v310 = iadd_imm v303, 9
@763be brnz v309, block12
@763be jump block13
block13:
@763c2 v311 = iconst.i32 608
@763c5 v312 = iadd.i32 v20, v311
@763c8 v313 = iconst.i32 112
@763cb v314 = iadd_imm.i64 v310, 6
@763cb store notrap aligned v314, v25+8
@763cb v315 = call fn1(v0, v0, v312, v307, v313)
@763cb v316 = load.i64 notrap aligned v25+8
@763d4 v317 = iconst.i32 496
@763d7 v318 = iadd.i32 v20, v317
@763da v319 = iconst.i32 608
@763dd v320 = iadd.i32 v20, v319
@763de v321 = iconst.i32 112
@763e1 v322 = iadd_imm v316, 8
@763e1 store notrap aligned v322, v25+8
@763e1 v323 = call fn1(v0, v0, v318, v320, v321)
@763e1 v324 = load.i64 notrap aligned v25+8
@763ea v325 = iconst.i32 608
@763ed v326 = iadd.i32 v20, v325
@763f0 v327 = iconst.i32 496
@763f3 v328 = iadd.i32 v20, v327
@763f4 v329 = iadd_imm v324, 7
@763f4 store notrap aligned v329, v25+8
@763f4 call fn9(v0, v0, v326, v328)
@763f4 v330 = load.i64 notrap aligned v25+8
@763fc v331 = iconst.i32 904
@763ff v332 = iadd.i32 v20, v331
@76400 v333 = iadd_imm v330, 4
@76400 store notrap aligned v333, v25+8
@76400 call fn10(v0, v0, v332)
@76400 v334 = load.i64 notrap aligned v25+8
@76408 v335 = iconst.i32 904
@7640b v336 = iadd.i32 v20, v335
@7640e v337 = iconst.i32 24
@76410 v338 = iadd.i32 v20, v337
@76413 v339 = iconst.i32 608
@76416 v340 = iadd.i32 v20, v339
@76417 v341 = iadd_imm v334, 10
@76417 store notrap aligned v341, v25+8
@76417 call fn11(v0, v0, v336, v338, v340)
@76417 v342 = load.i64 notrap aligned v25+8
@7641f v344 = iconst.i32 8
@76421 v345 = iadd.i32 v2, v344
@76424 v346 = iconst.i32 904
@76427 v347 = iadd.i32 v20, v346
@76428 v348 = iconst.i32 424
@7642b v349 = iadd_imm v342, 8
@7642b store notrap aligned v349, v25+8
@7642b v350 = call fn1(v0, v0, v345, v347, v348)
@7642b v351 = load.i64 notrap aligned v25+8
@76434 v352 = iconst.i32 0
@76436 v353 = heap_addr.i64 heap0, v2, 1
@76436 store little v352, v353
@7643d v354 = heap_addr.i64 heap0, v20, 1
@7643d v355 = load.i32 little v354+616
@76443 v356 = icmp_imm eq v355, 0
@76443 v357 = bint.i32 v356
@76444 v358 = iadd_imm v351, 8
@76444 brnz v357, block14(v20, v358, v25, v474)
@76444 jump block15
block15:
@76448 v359 = heap_addr.i64 heap0, v20, 1
@76448 v360 = load.i32 little v359+608
@76450 v361 = iconst.i32 12
@76452 v362 = imul.i32 v355, v361
@76455 v363 = iadd_imm.i64 v358, 7
@76455 jump block16(v363, v25, v360, v362, v20, v474)
block16(v365: i64, v367: i64, v373: i32, v393: i32, v402: i32, v542: i32):
v386 -> v367
v372 -> v373
v388 -> v373
v392 -> v393
v401 -> v402
v541 -> v542
@76455 v364 = iconst.i64 0
@76455 v366 = ifcmp v365, v364
@76455 brif sge v366, block18
@76455 jump block19(v365)
block18:
@76455 store.i64 notrap aligned v365, v367+8
@76455 v368 = global_value.i64 gv3
@76455 v369 = load.i64 notrap aligned readonly v368+0x0001_db38
@76455 v370 = load.i64 notrap aligned readonly v369+152
@76455 call_indirect sig0, v370(v368)
@76455 v371 = load.i64 notrap aligned v367+8
@76455 jump block19(v371)
block19(v380: i64):
@7645b v374 = iconst.i32 4
@7645d v375 = iadd.i32 v373, v374
@7645e v376 = heap_addr.i64 heap0, v375, 1
@7645e v377 = load.i32 little v376
@76463 v378 = icmp_imm eq v377, 0
@76463 v379 = bint.i32 v378
@76464 v381 = iadd_imm v380, 7
@76464 brnz v379, block20(v392, v381, v386, v401, v541)
@76464 jump block21
block21:
@76468 v382 = heap_addr.i64 heap0, v372, 1
@76468 v383 = load.i32 little v382
@7646d v384 = iconst.i32 1
@7646f v385 = iadd_imm.i64 v381, 5
@7646f store notrap aligned v385, v367+8
@7646f call fn12(v0, v0, v383, v377, v384)
@7646f v387 = load.i64 notrap aligned v367+8
@76475 jump block20(v392, v387, v367, v401, v541)
block20(v391: i32, v396: i64, v398: i64, v400: i32, v540: i32):
@76478 v389 = iconst.i32 12
@7647a v390 = iadd.i32 v373, v389
@7647f v394 = iconst.i32 -12
@76481 v395 = iadd v391, v394
@76484 v397 = iadd_imm v396, 9
@76484 brnz v395, block16(v397, v398, v390, v395, v400, v540)
@76484 jump block22
block22:
@76486 jump block17
block17:
@76487 jump block14(v400, v397, v398, v540)
block14(v399: i32, v407: i64, v418: i64, v539: i32):
v420 -> v399
v425 -> v418
v538 -> v539
@7648c v403 = heap_addr.i64 heap0, v399, 1
@7648c v404 = load.i32 little v403+612
@76492 v405 = icmp_imm eq v404, 0
@76492 v406 = bint.i32 v405
@76493 v408 = iadd_imm v407, 5
@76493 brnz v406, block23(v408)
@76493 jump block24
block24:
@76497 v409 = iconst.i32 12
@76499 v410 = imul.i32 v404, v409
@7649c v411 = icmp_imm eq v410, 0
@7649c v412 = bint.i32 v411
@7649d v413 = iadd_imm.i64 v408, 6
@7649d brnz v412, block23(v413)
@7649d jump block25
block25:
@764a1 v414 = heap_addr.i64 heap0, v399, 1
@764a1 v415 = load.i32 little v414+608
@764a7 v416 = iconst.i32 4
@764a9 v417 = iadd_imm.i64 v413, 5
@764a9 store notrap aligned v417, v418+8
@764a9 call fn12(v0, v0, v415, v410, v416)
@764a9 v419 = load.i64 notrap aligned v418+8
@764af jump block23(v419)
block23(v423: i64):
@764b2 v421 = iconst.i32 496
@764b5 v422 = iadd.i32 v399, v421
@764b6 v424 = iadd_imm v423, 4
@764b6 store notrap aligned v424, v418+8
@764b6 call fn13(v0, v0, v422)
@764b6 v426 = load.i64 notrap aligned v425+8
@764bc v427 = iadd_imm v426, 1
@764bc jump block5(v420, v427, v425, v538)
block12:
@764c1 v428 = iconst.i32 608
@764c4 v429 = iadd.i32 v20, v428
@764c5 v430 = iconst.i32 8
@764c7 v431 = iadd v429, v430
@764ca v432 = iconst.i32 8
@764cc v433 = iadd.i32 v307, v432
@764cd v434 = heap_addr.i64 heap0, v433, 1
@764cd v435 = load.i64 little v434
@764d2 v436 = heap_addr.i64 heap0, v431, 1
@764d2 store little v435, v436
@764d9 v437 = heap_addr.i64 heap0, v307, 1
@764d9 v438 = load.i64 little v437
@764de v439 = heap_addr.i64 heap0, v20, 1
@764de store little v438, v439+608
@764e4 v440 = iconst.i32 904
@764e7 v441 = iadd.i32 v20, v440
@764e8 v442 = iconst.i32 8
@764ea v443 = iadd v441, v442
@764ed v444 = heap_addr.i64 heap0, v443, 1
@764ed store little v435, v444
@764f4 v445 = heap_addr.i64 heap0, v20, 1
@764f4 store little v438, v445+904
@764fa v446 = iconst.i32 4
@764fc v447 = iadd.i32 v2, v446
@764ff v448 = iconst.i32 904
@76502 v449 = iadd.i32 v20, v448
@76503 v450 = iadd_imm.i64 v310, 33
@76503 store notrap aligned v450, v25+8
@76503 call fn14(v0, v0, v447, v449)
@76503 v451 = load.i64 notrap aligned v25+8
@7650b v452 = iconst.i32 1
@7650d v453 = heap_addr.i64 heap0, v2, 1
@7650d store little v452, v453
@76510 v454 = iadd_imm v451, 4
@76510 jump block5(v20, v454, v25, v474)
block8:
@76515 v455 = iconst.i32 904
@76518 v456 = iadd.i32 v20, v455
@76519 v457 = iadd_imm.i64 v33, 4
@76519 store notrap aligned v457, v25+8
@76519 call fn10(v0, v0, v456)
@76519 v458 = load.i64 notrap aligned v25+8
@76521 v459 = iconst.i32 405
@76524 v460 = iadd_imm v458, 3
@76524 store notrap aligned v460, v25+8
@76524 v461 = call fn15(v0, v0, v459)
@76524 v462 = load.i64 notrap aligned v25+8
@7652a v463 = heap_addr.i64 heap0, v20, 1
@7652a istore16 little v461, v463+1320
@76530 v464 = iconst.i32 8
@76532 v465 = iadd.i32 v343, v464
@76535 v466 = iconst.i32 904
@76538 v467 = iadd.i32 v20, v466
@76539 v468 = iconst.i32 424
@7653c v469 = iadd_imm v462, 9
@7653c store notrap aligned v469, v25+8
@7653c v470 = call fn1(v0, v0, v465, v467, v468)
@7653c v471 = load.i64 notrap aligned v25+8
@76545 v472 = iconst.i32 0
@76547 v473 = heap_addr.i64 heap0, v343, 1
@76547 store little v472, v473
@7654c v475 = iadd_imm v471, 5
@7654c store notrap aligned v475, v25+8
@7654c call fn16(v0, v0, v4)
@7654c v476 = load.i64 notrap aligned v25+8
@76554 v477 = iadd_imm v476, 2
@76554 store notrap aligned v477, v25+8
@76554 call fn17(v0, v0, v22)
@76554 v478 = load.i64 notrap aligned v25+8
@7655a v479 = iadd_imm v478, 1
@7655a jump block4(v20, v479, v25)
block7:
@7655f v480 = iconst.i32 4
@76561 v481 = iadd.i32 v2, v480
@76566 v482 = iadd_imm.i64 v110, 6
@76566 store notrap aligned v482, v25+8
@76566 call fn18(v0, v0, v481, v107, v105)
@76566 v483 = load.i64 notrap aligned v25+8
@7656e v484 = iconst.i32 1
@76570 v485 = heap_addr.i64 heap0, v2, 1
@76570 store little v484, v485
@76573 v486 = iadd_imm v483, 4
@76573 jump block5(v20, v486, v25, v474)
block6:
@76578 v487 = iconst.i32 720
@7657b v488 = iadd.i32 v20, v487
@7657c v489 = iconst.i32 24
@7657e v490 = iadd v488, v489
@76581 v491 = iconst.i32 24
@76583 v492 = iadd.i32 v257, v491
@76584 v493 = heap_addr.i64 heap0, v492, 1
@76584 v494 = load.i32 little v493
@76589 v495 = heap_addr.i64 heap0, v490, 1
@76589 store little v494, v495
@7658e v496 = iconst.i32 720
@76591 v497 = iadd.i32 v20, v496
@76592 v498 = iconst.i32 16
@76594 v499 = iadd v497, v498
@76597 v500 = iconst.i32 16
@76599 v501 = iadd.i32 v257, v500
@7659a v502 = heap_addr.i64 heap0, v501, 1
@7659a v503 = load.i64 little v502
@7659f v504 = heap_addr.i64 heap0, v499, 1
@7659f store little v503, v504
@765a4 v505 = iconst.i32 720
@765a7 v506 = iadd.i32 v20, v505
@765a8 v507 = iconst.i32 8
@765aa v508 = iadd v506, v507
@765ad v509 = iconst.i32 8
@765af v510 = iadd.i32 v257, v509
@765b0 v511 = heap_addr.i64 heap0, v510, 1
@765b0 v512 = load.i64 little v511
@765b5 v513 = heap_addr.i64 heap0, v508, 1
@765b5 store little v512, v513
@765bc v514 = heap_addr.i64 heap0, v257, 1
@765bc v515 = load.i64 little v514
@765c1 v516 = heap_addr.i64 heap0, v20, 1
@765c1 store little v515, v516+720
@765c7 v517 = iconst.i32 28
@765c9 v518 = iadd.i32 v2, v517
@765cc v519 = heap_addr.i64 heap0, v518, 1
@765cc store little v494, v519
@765d1 v520 = iconst.i32 20
@765d3 v521 = iadd.i32 v2, v520
@765d6 v522 = heap_addr.i64 heap0, v521, 1
@765d6 store little v503, v522
@765db v523 = iconst.i32 12
@765dd v524 = iadd.i32 v2, v523
@765e0 v525 = heap_addr.i64 heap0, v524, 1
@765e0 store little v512, v525
@765e7 v526 = heap_addr.i64 heap0, v2, 1
@765e7 store little v515, v526+4
@765ec v527 = iconst.i32 1
@765ee v528 = heap_addr.i64 heap0, v2, 1
@765ee store little v527, v528
@765f1 v529 = iadd_imm.i64 v260, 59
@765f1 jump block5(v20, v529, v25, v474)
block5(v530: i32, v533: i64, v535: i64, v537: i32):
@765f4 v531 = iconst.i32 24
@765f6 v532 = iadd v530, v531
@765f7 v534 = iadd_imm v533, 4
@765f7 store notrap aligned v534, v535+8
@765f7 call fn17(v0, v0, v532)
@765f7 v536 = load.i64 notrap aligned v535+8
@765ff v543 = iadd_imm v536, 2
@765ff store notrap aligned v543, v535+8
@765ff call fn16(v0, v0, v537)
@765ff v544 = load.i64 notrap aligned v535+8
@76605 jump block4(v530, v544, v535)
block4(v545: i32, v549: i64, v551: i64):
@76608 v546 = iconst.i32 1328
@7660b v547 = iadd v545, v546
@7660c v548 = global_value.i64 gv3
@7660c store notrap aligned v547, v548+1104
@76612 v550 = iadd_imm v549, 4
@76612 jump block1
block1:
@76612 store.i64 notrap aligned v550, v551+8
@76612 return
}
May 17 08:04:03.255 DEBUG with options: checker: false, algorithm: backtracking (block annotations: false)
May 17 08:04:03.255 DEBUG Compiling (opt level Speed):
function u0:2510(i64 vmctx, i64, i32, i32) fast {
gv0 = vmctx
gv1 = load.i64 notrap aligned readonly gv0
gv2 = load.i64 notrap aligned gv1
gv3 = vmctx
gv4 = load.i64 notrap aligned readonly gv3+1076
heap0 = static gv4, min 0, bound 0x0001_0000_0000, offset_guard 0x8000_0000, index_type i32
sig0 = (i64 vmctx) wasmtime_system_v
sig1 = (i64 vmctx, i64, i32, i32, i32, i32) fast
sig2 = (i64 vmctx, i64, i32, i32, i32) fast
sig3 = (i64 vmctx, i64, i32, i32) -> i32 fast
sig4 = (i64 vmctx, i64, i32, i32, i32) fast
sig5 = (i64 vmctx, i64, i32, i32) fast
fn0 = colocated u0:2503 sig1
fn1 = colocated u0:112 sig2
fn2 = colocated u0:111 sig3
fn3 = colocated u0:2505 sig4
fn4 = colocated u0:4772 sig5
stack_limit = gv2
- We've also had this discussion a little bit inside #146, but off-the-cuff I would expect that
RUST_LOGwould have an effect on "application code", and not on the server. I know you're vary about exporting environment variables to the wasm environment, but not being able to change log levels locally without changing the code is a bit of a pain. I know this isn't the issue for that, but consider ensuring that you're not locking yourself into a solution where this becomes impossible in the future.
from viceroy.
Related Issues (20)
- C@E/Viceroy error incompatibility: Sending to a nonexistent backend returns Inval on C@E, Error on Viceroy
- http/2 hyper errors in local development HOT 8
- 0.9.0 Breaks concurrency HOT 3
- Unclutter log output
- Support for arbitrary (or at least missing) ecp environment variables HOT 2
- Geo lookup returns FastlyStatus::None when not found, which is different from Compute HOT 2
- Provide a way to set the interval for samples when profiling HOT 1
- Support for several dynamic backends options is missing
- `fastly_geo.lookup` response is missing `gmt_offset` key
- client TLS info functions error in unanticipated ways
- panic expecting "response receiver is open" HOT 1
- CLI support for an optional ,interval for the guest profiler, to match wasmtime
- CLI options are mutally exclusive with `run` mode
- Populate secret and/or config stores from environment variables HOT 3
- Update Wasmtime HOT 1
- Backends creation should not fail when using the exact same backend builder twice. HOT 1
- Allow JSON files as input for Secrets Stores and KVStores HOT 16
- Golang programs that import flag or httptest will panic due to uninitialized os.Args HOT 5
- Inconsistent handling of headers with trailing spaces between Viceroy and Fastly
- Enforce Compute limits, optionally
Recommend Projects
-
React
A declarative, efficient, and flexible JavaScript library for building user interfaces.
-
Vue.js
🖖 Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.
-
Typescript
TypeScript is a superset of JavaScript that compiles to clean JavaScript output.
-
TensorFlow
An Open Source Machine Learning Framework for Everyone
-
Django
The Web framework for perfectionists with deadlines.
-
Laravel
A PHP framework for web artisans
-
D3
Bring data to life with SVG, Canvas and HTML. 📊📈🎉
-
Recommend Topics
-
javascript
JavaScript (JS) is a lightweight interpreted programming language with first-class functions.
-
web
Some thing interesting about web. New door for the world.
-
server
A server is a program made to process requests and deliver data to clients.
-
Machine learning
Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.
-
Visualization
Some thing interesting about visualization, use data art
-
Game
Some thing interesting about game, make everyone happy.
Recommend Org
-
Facebook
We are working to build community through open source technology. NB: members must have two-factor auth.
-
Microsoft
Open source projects and samples from Microsoft.
-
Google
Google ❤️ Open Source for everyone.
-
Alibaba
Alibaba Open Source for everyone
-
D3
Data-Driven Documents codes.
-
Tencent
China tencent open source team.
from viceroy.