Comments (1)
Ok, further to this I think I've found the problem.
The "A" version of the chips all have registers for 8 clocks, whether they use them or not, so the library works for all of those versions.
The "B/16QFN" version of the chips however have four clock outs, but the registers are in different places, mostly however within the same address spaces.
Why use the 16QFN version? They're roughly half the cost of the 20QFN chips.
So far I've been able to establish that.
CLK0 is in the place where CLK1 is on the other versions - This works if you use CLK1 in the library
CLK1 is in the place where CLK2 is on the other versions - This works if you use CLK2 in the library
CLK2 is in the place where CLK5 is on the other versions - This works if you use CLK5 in the library
CLK3 is in the place where CLK7 is on the other versions - However this doesn't work if you use CLK7 in the library.
So it looks like everything works except for CLK3. I had a look at the library and it looks like you're using binary maths to figure out the location of a bunch of the registers, bit shifting the clock number to hit the right register value to set the register you need to for each clock. Unfortunately for the B revision chips this won't work as the registers are in strange places. See attached screenshots of the data sheets.
https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/Si5351-B.pdf
from si5351arduino.
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