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cpunexus's Projects

ccpu icon ccpu

A 8-bit computer made of 74xx series logic gates and memory ICs.

cpu11 icon cpu11

Revengineered ancient PDP-11 CPUs, originals and clones

cscv2 icon cscv2

Version 2 of my Crazy Small CPU

cva6 icon cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

darkriscv icon darkriscv

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

mcpu icon mcpu

MCPU - A Minimal 8Bit CPU in a 32 Macrocell CPLD

neorv32 icon neorv32

:desktop_computer: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

neorv32-verilog icon neorv32-verilog

♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.

pasc icon pasc

Parallel Array of Simple Cores. Multicore processor.

r8051 icon r8051

8051 soft CPU core. 700-lines statements for 111 instructions . Fully synthesizable Verilog-2001 core.

scamp-cpu icon scamp-cpu

A homebrew 16-bit CPU with a homebrew Unix-like-ish operating system.

serv icon serv

SERV - The SErial RISC-V CPU

tim icon tim

A small CPU core complete with compiler and ISA specification. Eventually....

udarkrisc icon udarkrisc

u[Dark]RISC -- "micro-darkrisc" -- an early 16-bit micro-RISC processor defined before DarkRISCV

verigpu icon verigpu

OpenSource GPU, in Verilog, loosely based on RISC-V ISA

vm80a icon vm80a

i8080 precise replica in Verilog, based on reverse engineering of real die

zipcpu icon zipcpu

A small, light weight, RISC CPU soft core

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