Comments (7)
I actually successfully ran the tests before merging. Hmm...
Ninja-edit: I just ran fish's test again and it works locally. Looks like there's an incongruency w/ CI somehow.
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I figured out what is going on. Here is the chat log copied from the angr core channel:
fish [1:50 AM]
@lockshaw @subwire
in pyvex/lift/__init__.py:lift()
for lifter in lifters:
...
next_irsb_part = lifter(arch, addr)._lift(u_data, bytes_offset, max_bytes, max_inst, opt_level, traceflags, allow_lookback)
this is not ideal, since sometimes we have more than one lifters registered (apart from the default VEX lifter), and it's possible that the both lifters are able to lift that instruction
[1:51]
this is exactly why test cases on travis CI is failing: both BPF and MSP430 lifters are currently registered in the CI, and the MSP430 lifter is called first and tries to lift a BPF instruction
[1:55]
here is the old way:
for lifter, registered_arch in lifters:
if not isinstance(arch, registered_arch):
continue
I think the old way is better - we don't accidentally use lifters for one architecture to lift blocks in another architecture
[1:56]
Here is my proposal: we keep a dict that maps each supported architecture to a list of lifters, which will allow us to do the following:
for lifter in arch_lifters[arch.name]:
....
what do you think?
EDIT: Fix format issues.
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The related PyVEX commit: angr/pyvex@e47ca1b5
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To reproduce the issue locally: Add the following line at the beginning of test_bpf_idea.py
, right after import angr
:
from angr_platforms.msp430 import *
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Now this explains everything.
Yeah, let's add the arch, that makes perfect sense.
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This issue has been marked as stale
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This issue has been closed due to inactivity.
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Related Issues (10)
- BF lifter is untested and bitrotted HOT 12
- ModuleNotFoundError for MSP430
- Can not create new branch for pull request HOT 2
- Do you have any plans to support riscv 64bit? HOT 2
- No module named procedures HOT 2
- MULSU instruction lifting not well typed operation error HOT 3
- 'Mismatch between format bit 0 and instruction bit 1' HOT 2
- angr misses paths on RISC-V binary found by other symbolic execution engines HOT 3
- Atmel AVR support HOT 4
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