Comments (4)
The CPU is cycle accurate
from magenboy.
The MMU could block only when the PPU is cycle accurate (and for that it needs first to wake up from being off in cycle 0 and not the current CPU cycle of this frame).
from magenboy.
Currently (as after the ppu accurate has merged) the system is not cycle accurate but opcode accurate.
that means that opcodes that takes more than one m_cycle can trigger unexpected behavior, like not being able to read from the ram even the should be not blocked (the opcode is triggered when there is one cycle left before the hblank and the opcode takes 4 m_cycles so the ram should be available, but because I update it only at the end of the opcode it wont be available
from magenboy.
Since I currently have no intention of making the system cycle accurate but Im fine with opcode accurate Ill close this issue.
from magenboy.
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from magenboy.